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L9942 数据表(PDF) 25 Page - STMicroelectronics |
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L9942 数据表(HTML) 25 Page - STMicroelectronics |
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25 / 40 page ![]() L9942 SPI - control and status registers Doc ID 11778 Rev 7 25/40 5.4 Register 3 The meaning of the different bits is as follows: 5.5 Register 4 and 5 The meaning of the different bits is as follows: Table 17. Register 3 Bit Current profile 3 PWM counter PWM Current profile 2 12 11 10 9 8 7 6 5 4 3 2 1 0 Access r w r w r w r w r w r w r w r w r w r w r w r w r w Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 Name I4 I3 I2 I1 I0 D1 D0 NPW M I4 I3 I2 I1 I0 I4 I3 I2 I1 I0 These bits are loaded in register1 DAC Phase A or B if needed. See also parameter Table 12 D1 D0 These bits are for threshold value in counter of active time during signal PWM. - NPWM This bit switches internal PWM signal of bridge A to pin PWM if it is set to 0, otherwise pin is in high resistance status. - Table 18. Register 4 and 5 Bit Current profile 5 (7) PWM counter Current profile 4 (6) 12 11 10 987 6 5 4 3 21 0 Access r w r w r w r w r w r w r w r w r w r w r w r w r w Reset 0 0 0 000 0 0 0 0 00 0 Name I4 I3 I2 I1 I0 D4(7) D3(6) D2(5) I4 I3 I2 I1 I0 I4 I3 I2 I1 I0 These bits are loaded needed. in register1 DAC Phase A or B if needed. See also parameter Table 12 D4 D3 D2 (register4) These bits are for threshold value in counter of active time during signal PWM. LSB and next value are set in register3 by D0 and D1. - D7 D6 D5 (register5) |
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