数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

L9942 数据表(PDF) 28 Page - STMicroelectronics

部件名 L9942
功能描述  Integrated stepper motor driver for bipolar stepper motors with microstepping and programmable current profile
PDF  40 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L9942 数据表(HTML) 28 Page - STMicroelectronics

Back Button L9942 Datasheet HTML 24Page - STMicroelectronics L9942 Datasheet HTML 25Page - STMicroelectronics L9942 Datasheet HTML 26Page - STMicroelectronics L9942 Datasheet HTML 27Page - STMicroelectronics L9942 Datasheet HTML 28Page - STMicroelectronics L9942 Datasheet HTML 29Page - STMicroelectronics L9942 Datasheet HTML 30Page - STMicroelectronics L9942 Datasheet HTML 31Page - STMicroelectronics L9942 Datasheet HTML 32Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 40 page
background image
Logic with SPI - electrical characteristics
L9942
28/40
Doc ID 11778 Rev 7
6
Logic with SPI - electrical characteristics
VS = 7 to 20 V, VCC = 3.0 to 5.3 V, EN=VCC, Tj = -40 to 150 °C, IREF = -200 A, unless
otherwise specified. The voltages are referred to GND and currents are assumed positive,
when the current flows into the pin.
6.1
Inputs: CSN, CLK, STEP, EN and DI
6.2
DI timing
Table 21.
Inputs: CSN, CLK, STEP, EN and DI
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
Vin L
input low level
-
0.3*VCC
0.4*VCC
-
V
Vin H
input high level
-
-
0.6*VCC
0.7*VCC
V
Vin Hyst
input hysteresis
-
-
0.1*VCC
-
V
ICSN in
pull up current at input CSN
VCSN = VCC -1.5 V,
-50
-25
-10
µA
ICLK in
pull down current at input CLK
VCLK = 1.5 V
10
25
50
µA
IDI in
pull down current at input DI
VDI = 1.5 V
10
25
50
µA
ISTEP in
pull down current at input STEP
VSTEP = 1.5 V
10
25
50
µA
REN in
resistance at input EN to GND
VEN in = VCC
110
510
k

Cin
(1)
input capacitance at input CSN,
CLK, DI and PWM
0 V < VCC < 5.3 V
-
10
15
pF
1.
Parameter guaranteed by design.
Table 22.
DI timing (see Figure 11 and Figure 13) (1)
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
tCLK
Clock period
VCC = 5 V
250
-
-
ns
tCLKH
Clock high time
VCC = 5 V
100
-
-
ns
tCLKL
Clock low time
VCC = 5 V
100
-
-
ns
tset CSN
CSN set up time, CSN low before
rising edge of CLK
VCC = 5 V
100
-
-
ns
tset CLK
CLK set up time, CLK high before
rising edge of CSN
VCC = 5 V
100
-
-
ns
tset DI
DI set up time
VCC = 5 V
50
-
-
ns
thold DI
DI hold time
VCC = 5 V
50
-
-
ns
tr in
Rise time of input signal DI, CLK,
CSN
VCC = 5 V
-
-
25
ns
tf in
Fall time of input signal DI, CLK,
CSN
VCC = 5 V
-
-
25
ns
1.
DI timing parameters tested in production by a passed/failed test:
Tj=-40°C/+25°C: SPI communication @5MHz; Tj=+125°C: SPI communication @4.25MHz



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com