FC106 datasheet(2/32 Pages) STMICROELECTRONICS

2 / 32 page

FC106

Revision 1.2

2/32

September 98

Table of Contents

General Description - - - - - - - - - - ----- -- - - --- 4

Interface Diagram - - - - - - ------ --- --- -- - - - 6

Functional Description - - - - - ----- -- -- - - - - - - 7

3.1 Block diagram - - - - - ------- - ----- ---- - 8

3.2 Input latches - - - - - - - - - - - - - - - - - - - - - - - - 8

3.3 8bit/10bit Encoder/Decoder - - - ---- ---- -- ---- 9

3.4 DLL clock generator

- - - - - - - - - ---- - - -- - - - 9

3.5 Serializer functional description and reference clock ----- 9

3.6 Serializer latches and XOR-tree - - - - - - - ---- - - - 10

3.7 Serial input multiplexer - - - - - - - - - - - ----- -- 10

3.8 Deserializer functional description ---- ------- -- 10

3.9 Bit alignment - - - - - - - - - - - - - - - - - - - - - - - 11

3.10 Byte and word alignment

- - - ---- ----- - - - - 12

3.11 Clock recovery

- - - - - - - - - - - - - - - - - - - - - 12

3.12 Serial input-output buffer

- - - ---- ----- - - - - 13

3.13 I/O impedance control ----- - - - - -- - - --- -- 14

3.14 Self-test ----- - - - - --- - - --- -- ------ 15

Serial I/O Electrical Model

- ---- -- -- - - - - - - - - 16

Electrical Specifications

- - - - - - - - - - - - - ---- - 17

5.1 Absolute maximum ratings - - - - - - - - ---- -- - - 17

5.2 Operating conditions - - - - - ----- -- -- - - - - - 17

5.3 DC characteristics

- - - - - - - - - - - - - ---- - - - 18

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