IS25LE02GG-RHLA2:P-TY datasheet(145/187 Pages) ISSI

部件名	IS25LE02GG-RHLA2:P-TY

功能描述	SERIAL FLASH MEMORY 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	187 Pages

Scroll/Zoom	100%

制造商	ISSI [Integrated Silicon Solution, Inc]

网页	http://www.issi.com

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145 / 187 page

IS25LE02GG

IS25WE02GG

Integrated Silicon Solution, Inc.- www.issi.com

145

Rev. A1

10/02/2025

8.49 ENTER 4-BYTE ADDRESS MODE OPERATION (EN4B, B7h)

The Enter 4-byte Address Mode instruction allows 32bit address (A31-A0) to be used to access the memory array

beyond 128Mb. To execute EN4B operation, the host drives CE# low, sends the instruction code and then drives

CE# high. The Exit 4-byte Address Mode instruction can be used to exit the 4-byte address mode.

A Write Enable (WREN, 06h) command is not required prior to EN4B (B7h) command.

Note: The EN4B instruction will set the Bit 7 (EXTADD) of the volatile Bank Address Register to “1”, but will not change

the non-volatile Bank Address Register.

Figure 8.107 Enter 4-byte Address Mode Sequence In SPI Mode

Instruction = B7h

CE#

SCK

Mode 3

Mode 0

High Impedance

Figure 8.108 Enter 4-byte Address Mode Sequence In QPI Mode

B7h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

IS25LE02GG-RHLA2:P-TY 数据表(PDF) 145 Page - Integrated Silicon Solution, Inc