IS25LE02GG-RHLA2:P-TY datasheet(146/187 Pages) ISSI

部件名	IS25LE02GG-RHLA2:P-TY

功能描述	SERIAL FLASH MEMORY 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	187 Pages

Scroll/Zoom	100%

制造商	ISSI [Integrated Silicon Solution, Inc]

网页	http://www.issi.com

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146 / 187 page

IS25LE02GG

IS25WE02GG

Integrated Silicon Solution, Inc.- www.issi.com

146

Rev. A1

10/02/2025

8.50 EXIT 4-BYTE ADDRESS MODE OPERATION (EX4B, 29h)

In order to be backward compatible, the Exit 4-byte Address Mode instruction allows 24bit address (A23-A0) to be

used to access the memory array up to 128Mb. The Bank Address Register must be used to access the memory

array beyond 128Mb. To execute EX4B operation, the host drives CE# low, sends the instruction code and then

drives CE# high.

A Write Enable (WREN, 06h) command is not required prior to EX4B (29h) command.

Note: The EX4B instruction will reset the Bit 7 (EXTADD) of the volatile Bank Address Register to “0” ”, but will not

change the non-volatile Bank Address Register.

Figure 8.109 Exit 4-byte Address Mode Sequence In SPI Mode

Instruction = 29h

CE#

SCK

Mode 3

Mode 0

High Impedance

Figure 8.110 Exit 4-byte Address Mode Sequence In QPI Mode

29h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

IS25LE02GG-RHLA2:P-TY 数据表(PDF) 146 Page - Integrated Silicon Solution, Inc