L4969

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1.11 Memory Map

The memory space is divided up into 16 different registers each being directly accessible using the SPI.

Each register contains specific information of a functional group.

In general al reserved bitpositions (‘RES’) have to be written with ‘0’.

Undefined bits are read as ‘0’ and cannot be overwritten.

In addition there is one register (CTSR) being read only, thus any write attempt will leave the register content

unchanged.

Certain interlock mechanism exist to prevent unwanted overwriting of important functions i.e. voltage regulators

or oscillator adjustments. These mechanisms are described with the functions of these registers.

Table 5.

L4969 Memory Map

ADR

Group

MSB

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

0

VRCR

Undefined

Register Memory

EUV3

EUV2

RTC0

TRC

RES

ENV3

ENV2

DISAR

1CTCR

ACT

TXEN

RES

RES

RES

LP2

LP1

LP0

2GPTR

RES

RES

RES

RES

TM1

TM0

TMUX

TEN

3

RCADJ

CG1

CG0

PGEN

SIGN

ADJ3

ADJ2

ADJ1

ADJ0

4WDC

WDEN

WND

SWT1

SWT0

WDT3

WDT2

WDT1

WDT0

5GIEN

ISET

IRES

EUV

EOVT

EEW

ECW

EWW

EIFW

6IFR

ESPI

ISET

IRES

UV23

UVVS

OVT3

OVT2

OVT1

WKE

WKC

WKW

WKIF

7CTSR

RES

RES

RES

GSH

EX

EVIII

EVII

EVI

EIV

EIII

EII

EI

8ID01

A11

A10

A01

A00

B11

B10

B01

B00

C11

C10

C01

C00

9ID23

D11

D10

D01

D00

E11

E10

E01

E00

F11

F10

F01

F00

10

BTL

PS23

PS22

PS21

PS20

PS13

PS12

PS11

PS10

TD3

TD2

TD1

TD0

11

NAV

Undefined

Register Memory

12

NAV

13

NAV

14

TEST

T11

T10

T09

T08

T07

T06

T05

T04

T03

T02

T01

T00

15

SYS

Undefined Register Memory

NCRC

STAT

WNDF

STF

OTF

UCF

WAKE

NPOR

*1) “shorted to ...”