STM32L4P5CE datasheet(265/311 Pages) STMICROELECTRONICS

265 / 311 page

DS12903 Rev 2

265/311

STM32L4P5xx

Electrical characteristics

277

Table 116. OCTOSPI characteristics in DTR mode (with DQS)(1)/Octal and Hyperbus

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

FCK

1/t(CK)

OCTOSPI clock

frequency

1.71 V < VDD < 3.6 V

Voltage Range V1

CLOAD = 20 pF

60(2)

MHz

2.7 V < VDD < 3.6 V

Voltage Range V1

CLOAD = 20 pF

90(2)(3)

1.71 V < VDD < 3.6 V

Voltage Range V1

CLOAD = 15 pF

66(3)

1.71 V < VDD < 3.6 V

Voltage Range V2

CLOAD = 20 pF

26(2)

tw(CKH)

OCTOSPI clock high

and low time

Even division

t(CK)/2-1

t(CK)/2+0.5

tw(CKL)

t(CK)/2-0.5

t(CK)/2+0.5

tw(CKH)

OCTOSPI clock high

and low time

Odd division

(n/2)*t(CK)/

(n+1)- 0.5

(n/2)*t(CK)/

(n+1)+0.5

tw(CKL)

(n/2+1)*t(CK)/

(n+1) -0.5

(n/2+1)*t(CK)/

(n+1)+0.5

tv(CK)

Clock valid time

t(CK) +2

th(CK)

Clock hold time

t(CK)/2 -0.5

VODr(CK)

(4)

CK,CK# crossing level

on CK rising edge

VDD=1v8

730

997

VODf(CK)

(4)

CK,CK# crossing level

on CK falling edge

VDD=1v8

788

1070

tw(CS)

Chip select high time

3*t(CK)

tv(DQ)

Data input vallid time

-0

tv(DS)

Data storbe input valid

time

th(DS)

Data storbe input hold

time

-0

tv(RWDS)

Data storbe output

valid time

3*t(CK)

tsr(DQ),tsf(DQ) Data input setup time

Voltage Range V1

-0.75

t(CK)/2

-3.75(5)

Voltage Range V2

-1

t(CK)/2

-5(5)

thr(DQ),thf(DQ) Data input hold time

Voltage Range V1

3.75

Voltage Range V2

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