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STM32L4P5CE 数据表(PDF) 268 Page - STMicroelectronics |
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STM32L4P5CE 数据表(HTML) 268 Page - STMicroelectronics |
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268 / 311 page  Electrical characteristics STM32L4P5xx 268/311 DS12903 Rev 2 Figure 65. OCTOSPI Hyperbus write Delay block Unless otherwise specified, the parameters given in Table 117 for delay block are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 22: Operating conditions at power-up / power-down with the configuration shown in the table below. Table 117. Dynamics characteristics: Delay Block characteristics Symbol Parameter Conditions Min Typ Max Unit tinit Initial delay - 700 875 1000 ps t∆ Unit Delay - 375 500 750 MSv47734V1 CS# Access Latency Latency Count Command-Address 47:40 39:32 31:24 23:16 15:8 7:0 Dn A Dn B Dn+1 A Dn+1 B Host drives DQ[7:0] and Memory drives RWDS Host drives DQ[7:0] and RWDS CK, CK# RWDS DQ[7:0] tw(CS) tv(RWDS) tv(CK) th(CK) High = 2x Latency Count Low = 1x Latency Count Read Write Recovery th(OUT) tv(OUT) th(OUT) tv(OUT) th(OUT) tv(OUT) |
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