STM32F427AI datasheet(7/240 Pages) STMICROELECTRONICS

7 / 240 page

DS9405 Rev 12

7/240

STM32F427xx STM32F429xx

List of tables

Table 1.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Table 2.

STM32F427xx and STM32F429xx features and peripheral counts . . . . . . . . . . . . . . . . . . 16

Table 3.

Voltage regulator configuration mode versus device operating mode . . . . . . . . . . . . . . . . 29

Table 4.

Regulator ON/OFF and internal reset ON/OFF availability. . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 5.

Voltage regulator modes in stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 6.

Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 7.

Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Table 8.

USART feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Table 9.

Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Table 10.

STM32F427xx and STM32F429xx pin and ball definitions . . . . . . . . . . . . . . . . . . . . . . . . 53

Table 11.

FMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Table 12.

STM32F427xx and STM32F429xx alternate function mapping . . . . . . . . . . . . . . . . . . . . . 75

Table 13.

STM32F427xx and STM32F429xx register boundary addresses. . . . . . . . . . . . . . . . . . . . 87

Table 14.

Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

Table 15.

Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

Table 16.

Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

Table 17.

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Table 18.

Limitations depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . . 97

Table 19.

VCAP1/VCAP2 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Table 20.

Operating conditions at power-up / power-down (regulator ON) . . . . . . . . . . . . . . . . . . . . 98

Table 21.

Operating conditions at power-up / power-down (regulator OFF). . . . . . . . . . . . . . . . . . . . 98

Table 22.

Reset and power control block characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Table 23.

Over-drive switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Table 24.

Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (ART accelerator enabled except prefetch) or RAM . . . . . . 102

Table 25.

Typical and maximum current consumption in Run mode, code with data processing

running from Flash memory (ART accelerator disabled) . . . . . . . . . . . . . . . . . . . . . . . . . 103

Table 26.

Typical and maximum current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . 104

Table 27.

Typical and maximum current consumptions in Stop mode . . . . . . . . . . . . . . . . . . . . . . . 105

Table 28.

Typical and maximum current consumptions in Standby mode . . . . . . . . . . . . . . . . . . . . 106

Table 29.

Typical and maximum current consumptions in VBAT mode. . . . . . . . . . . . . . . . . . . . . . . 106

Table 30.

Typical current consumption in Run mode, code with data processing running from

Flash memory or RAM, regulator ON (ART accelerator enabled except prefetch),

VDD=1.7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Table 31.

Typical current consumption in Run mode, code with data processing running

from Flash memory, regulator OFF (ART accelerator enabled except prefetch). . . . . . . 109

Table 32.

Typical current consumption in Sleep mode, regulator ON, VDD=1.7 V . . . . . . . . . . . . . 110

Table 33.

Tyical current consumption in Sleep mode, regulator OFF. . . . . . . . . . . . . . . . . . . . . . . . 111

Table 34.

Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Table 35.

Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

Table 36.

Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

Table 37.

High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

Table 38.

Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

Table 39.

HSE 4-26 MHz oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

Table 40.

LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

Table 41.

HSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

Table 42.

LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

Table 43.

Main PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

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