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STM32F427AI 数据表(PDF) 92 Page - STMicroelectronics |
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STM32F427AI 数据表(HTML) 92 Page - STMicroelectronics |
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92 / 240 page ![]() Electrical characteristics STM32F427xx STM32F429xx 92/240 DS9405 Rev 12 6.1.6 Power supply scheme Figure 22. Power supply scheme 1. To connect BYPASS_REG and PDR_ON pins, refer to Section 3.17: Power supply supervisor and Section 3.18: Voltage regulator 2. The two 2.2 µF ceramic capacitors should be replaced by two 100 nF decoupling capacitors when the voltage regulator is OFF. 3. The 4.7 µF ceramic capacitor must be connected to one of the VDD pins. 4. VDDA=VDD and VSSA=VSS. Caution: Each power supply pair (VDD/VSS, VDDA/VSSA ...) must be decoupled with filtering ceramic capacitors as shown above. These capacitors must be placed as close as possible to, or below, the appropriate pins on the underside of the PCB to ensure good operation of the device. It is not recommended to remove filtering capacitors to reduce PCB size or cost. This might cause incorrect operation of the device. MS19911V3 Backup circuitry (OSC32K,RTC, Wakeup logic Backup registers, backup RAM) Kernel logic (CPU, digital & RAM) Analog: RCs, PLL,.. Power switch VBAT GPIOs OUT IN 15 × 100 nF + 1 × 4.7 μF VBAT = 1.65 to 3.6V Voltage regulator VDDA ADC IO Logic VDD 100 nF + 1 μF Flash memory VCAP_1 VCAP_2 2 × 2.2 μF BYPASS_REG PDR_ON Reset controller VDD 1/2/...14/15 VSS 1/2/...14/15 VDD VREF+ VREF- VSSA VREF 100 nF + 1 μF |
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