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DS20005529D-page 3

DSC1001/3/4

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings †

Input Voltage (VIN) ............................................................................................................................–0.3V to VDD + 0.3V

ESD Protection ....................................................................................................... 4 kV HBM, ±200V MM, 1.5 kV CDM

Recommended Operating Conditions

Supply Voltage (VDD) ................................................................................................................................ +1.7V to +3.6V

Output Load (ZL) ............................................................................................................................. R > 10 kΩ, C ≤ 15 pF

† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.

This is a stress rating only and functional operation of the device at those or any other conditions above those indicated

in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended

periods may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS

Electrical Characteristics: VDD = 1.8 to 3.3V; TA = +85°C unless otherwise specified.

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Frequency

F0

1

—

150

MHz

Single Frequency

Frequency Tolerance

Δf

—

—

±10

ppm

Includes frequency variations

due to initial tolerance,

temperature and power supply

voltage

—

—

±20

—

—

±25

—

—

±50

Aging

Δf

—

—

±5

ppm

1 year @ +25°C

Supply Current, Standby

IDD

—

—

15

µA

T = +25°C

Output Startup Time

(Note 1)

tSU

—

1.0

1.3

ms

T = +25°C

Output Disable Time

tDA

—

20

100

ns

—

Output Duty Cycle

SYM

45

—

55

%

—

Input Logic Level High

VIH

0.75 x VDD

—

—

V

—

Input Logic Level Low

VIL

—

—

0.25 x VDD

V

—

VDD = 1.8V

Supply Current, No Load

IDD

—

6.0

6.3

mA

1 MHz

CL = 0 pF,

RL = ∞,

T = +25°C

—

6.5

7.1

27 MHz

—

7.2

8.5

70 MHz

—

8.3

11.9

150 MHz

Output Logic Level High

VOH

0.8 x VDD

—

—

V

–6 mA, DSC1004, CL = 40 pF

0.8 x VDD

—

—

–6 mA, DSC1003, CL = 25 pF

0.8 x VDD

—

—

–4 mA, DSC1001, CL = 15 pF

Output Logic Level Low

VOL

—

—

0.2 x VDD

V

6 mA, DSC1004, CL = 40 pF

—

—

0.2 x VDD

6 mA, DSC1003, CL = 25 pF

—

—

0.2 x VDD

4 mA, DSC1001, CL = 15 pF

Note 1: tSU is time to stable output frequency after VDD is applied. tSU and tEN (after EN is asserted) are identical

values.

2: Measured over 50k clock cycles.