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ST7LITE1XB 数据表(PDF) 38 Page - STMicroelectronics |
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ST7LITE1XB 数据表(HTML) 38 Page - STMicroelectronics |
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38 / 157 page ![]() ST7LITE1xB 38/157 INTERRUPTS (Cont’d) EXTERNAL INTERRUPT CONTROL REGISTER (EICR) Read/Write Reset Value: 0000 0000 (00h) Bits 7:6 = IS3[1:0] ei3 sensitivity These bits define the interrupt sensitivity for ei3 (Port B0) according to Table 6. Bits 5:4 = IS2[1:0] ei2 sensitivity These bits define the interrupt sensitivity for ei2 (Port B3) according to Table 6. Bits 3:2 = IS1[1:0] ei1 sensitivity These bits define the interrupt sensitivity for ei1 (Port A7) according to Table 6. Bits 1:0 = IS0[1:0] ei0 sensitivity These bits define the interrupt sensitivity for ei0 (Port A0) according to Table 6. Notes: 1. These 8 bits can be written only when the I bit in the CC register is set. 2. Changing the sensitivity of a particular external interrupt clears this pending interrupt. This can be used to clear unwanted pending interrupts. Refer to section “External Interrupt Function” on page 48. Table 6. Interrupt Sensitivity Bits EXTERNAL INTERRUPT SELECTION REGIS- TER (EISR) Read/Write Reset Value: 0000 1100 (0Ch) Bits 7:6 = ei3[1:0] ei3 pin selection These bits are written by software. They select the Port B I/O pin used for the ei3 external interrupt ac- cording to the table below. External Interrupt I/O pin selection Note: 1. Reset State Bits 5:4 = ei2[1:0] ei2 pin selection These bits are written by software. They select the Port B I/O pin used for the ei2 external interrupt ac- cording to the table below. External Interrupt I/O pin selection Notes: 1. Reset State 2. PB4 cannot be used as an external interrupt in HALT mode. 70 IS31 IS30 IS21 IS20 IS11 IS10 IS01 IS00 ISx1 ISx0 External Interrupt Sensitivity 0 0 Falling edge & low level 0 1 Rising edge only 1 0 Falling edge only 1 1 Rising and falling edge 70 ei31 ei30 ei21 ei20 ei11 ei10 ei01 ei00 ei31 ei30 I/O Pin 0 0 PB0 1) 0 1 PB1 1 0 PB2 ei21 ei20 I/O Pin 0 0 PB3 1) 0 1 PB4 2) 1 0 PB5 1 1 PB6 1 |
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