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ST7LITE1XB 数据表(PDF) 51 Page - STMicroelectronics |
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ST7LITE1XB 数据表(HTML) 51 Page - STMicroelectronics |
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51 / 157 page  ST7LITE1xB 51/157 I/O PORTS (Cont’d) Table 9. I/O Configurations Notes: 1. When the I/O port is in input configuration and the associated alternate function is enabled as an output, reading the DR register will read the alternate function output status. 2. When the I/O port is in output configuration and the associated alternate function is enabled as an input, the alternate function reads the pin status given by the DR register content. Hardware Configuration CONDITION PAD EXTERNAL INTERRUPT POLARITY DATA BUS INTERRUPT DR REGISTER ACCESS W R FROM OTHER PINS SOURCE (eix) SELECTION DR REGISTER ALTERNATE INPUT ANALOG INPUT To on-chip peripheral COMBINATIONAL LOGIC PAD DATA BUS DR DR REGISTER ACCESS R/W REGISTER PAD DATA BUS DR DR REGISTER ACCESS R/W ALTERNATE ALTERNATE ENABLE OUTPUT REGISTER BIT From on-chip periphera l 1 |
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