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M58MR032C 数据表(PDF) 28 Page - STMicroelectronics

部件名 M58MR032C
功能描述  32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory
PDF  52 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M58MR032C 数据表(HTML) 28 Page - STMicroelectronics

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Table 22. Burst Read Information
Table 23. Security Code Area
Offset
Data
Description
Value
(P)+13h = 48h
0003h
Page-mode read capability
bits 0-7
’n’ such that 2n HEX value represents the number of read-
page bytes. See offset 28h for device word width to
determine page-mode data output width. 00h indicates
no read page buffer.
8 Byte
(P+14)h = 49h
0003h
Number of synchronous mode read configuration fields that follow. 00h
indicates no burst capability.
3
(P+15)h = 4Ah
0001h
Synchronous mode read capability configuration 1
bit 3-7
Reserved
bit 0-2
’n’ such that 2n+1 HEX value represents the maximum
number of continuous synchronous reads when the device is
configured for its maximum word width. A value of 07h
indicates that the device is capable of continuous linear bursts
that will output data until the internal burst counter reaches
the end of the device’s burstable address space. This field’s
3-bit value can be written directly to the read configuration
register bit 0-2 if the device is configured for its maximum
word width. See offset 28h for word width to determine the
burst data output width.
4
(P+16)h = 4Bh
0002h
Synchronous mode read capability configuration 2
8
(P+17)h = 4Ch
0007h
Synchronous mode read capability configuration 3
Cont.
(P+18)h = 4Dh
0028h
Max operating clock frequency (MHz)
40 MHz
(P+19)h = 4Eh
0001h
Supported handshaking signal (WAIT pin)
bit 0
during synchronous read
(1 = Yes, 0 = No)
bit 1
during asynchronous read
(1 = Yes, 0 = No)
Yes
No
Offset
Data
Description
80h
0000-0000-0000-0XX0
Lock Protection Register
81h
XXXX
64 bits: unique device number
82h
XXXX
83h
XXXX
84h
XXXX
85h
XXXX
64 bits: User Programmable OTP
86h
XXXX
87h
XXXX
88h
XXXX



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