R5F572TFCDFB datasheet(82/120 Pages) RENESAS

82 / 120 page

R01DS0331EJ0110 Rev.1.10

Page 82 of 120

Oct 06, 2023

RX72T Group

2. Electrical Characteristics

Figure 2.34

Output Disable Time for POEG via Detection Flag in Response to the Input Level

Detection of the GTETRGn pin

Figure 2.35

Output Disable Time for POEG in Response to Detection of the Output Stopping Signal

from GPTW

Figure 2.36

Output Disable Time for POEG in Response to Edge Detection Signal from a

Comparator

Figure 2.37

Output Disable Time for POEG in Response to the Register Setting

GTETRGn input

(n = A to D)

GPTW PWM output pins

Outputs disabled

tPOEGDI

tPOEGW

POEGGn.PIDF flag

(n = A to D)

Note 1. GPTWn.GTST.DTEF (dead time error flag), GPTWn.GTST.OABLF (simultaneous low output flag),

or GPTWn.GTST.OABHF (simultaneous high output flag)

Output stopping signal

from GPTW*1

GPTW PWM output pins

Outputs disabled

tPOEGDE

COMPn edge detection

signal (n = 0 to 5)

GPTW PWM output pins

Outputs disabled

tPOEGDC

GPTW PWM output pins

Outputs disabled

tPOEGDS

POEGGn.SSF bit

(n = A to D)

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