PSD913F2 datasheet(24/94 Pages) STMICROELECTRONICS

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The

PSD9XX

Functional

Blocks

(cont.)

9.1.1.5.5 Data Polling Flag DQ7

When Erasing or Programming the Flash memory bit DQ7 outputs the complement of the

bit being entered for Programming/Writing on DQ7. Once the Program instruction or the

Write operation is completed, the true logic value is read on DQ7 (in a Read operation).

Flash memory specific features:

t Data Polling is effective after the fourth Write pulse (for programming) or after the

sixth Write pulse (for Erase). It must be performed at the address being programmed

or at an address within the Flash sector being erased.

t During an Erase instruction, DQ7 outputs a ‘0’. After completion of the instruction,

DQ7 will output the last bit programmed (it is a ‘1’ after erasing).

t If the byte to be programmed is in a protected Flash sector, the instruction is

ignored.

t If all the Flash sectors to be erased are protected, DQ7 will be set to ‘0’ for

about 100 µs, and then return to the previous addressed byte. No erasure will be

performed.

9.1.1.5.6 Toggle Flag DQ6

The PSD9XX offers another way for determining when the Flash memory Program

instruction is completed. During the internal Write operation and when either the FSi or

CSBOOTi is true, the DQ6 will toggle from ‘0’ to ‘1’ and ‘1’ to ‘0’ on subsequent attempts to

read any byte of the memory.

When the internal cycle is complete, the toggling will stop and the data read on the

Data Bus D0-7 is the addressed memory byte. The device is now accessible for a new

Read or Write operation. The operation is finished when two successive reads yield the

same output data. Flash memory specific features:

t The Toggle bit is effective after the fourth Write pulse (for programming) or after the

sixth Write pulse (for Erase).

t If the byte to be programmed belongs to a protected Flash sector, the instruction is

ignored.

t If all the Flash sectors selected for erasure are protected, DQ6 will toggle to ‘0’ for

about 100 µs and then return to the previous addressed byte.

9.1.1.5.7 Error Flag DQ5

During a correct Program or Erase, the Error bit will set to ‘0’. This bit is set to ‘1’ when

there is a failure during Flash byte programming, Sector erase, or Bulk Erase.

In the case of Flash programming, the Error Bit indicates the attempt to program a Flash

bit(s) from the programmed state (0) to the erased state (1), which is not a valid operation.

The Error bit may also indicate a timeout condition while attempting to program a byte.

In case of an error in Flash sector erase or byte program, the Flash sector in which the

error occurred or to which the programmed byte belongs must no longer be used.

Other Flash sectors may still be used. The Error bit resets after the Reset instruction.

9.1.1.5.8

Erase Time-out Flag DQ3

The Erase Timer bit reflects the time-out period allowed between two consecutive Sector

Erase instructions. The Erase timer bit is set to ‘0’ after a Sector Erase instruction for a

time period of 100 µs + 20% unless an additional Sector Erase instruction is decoded.

After this time period or when the additional Sector Erase instruction is decoded, DQ3 is

set to ‘1’.

PSD9XX Family

Preliminary Information

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