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SBPH400-3 数据表(PDF) 5 Page - STMicroelectronics |
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SBPH400-3 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 43 page ![]() SBPH400-3 5/43 Figure 1.1 SBP H400-3 block diagram Strb_Tx Strb_En Data_Tx Data_En Speed_Tx Strb_Rx Data_Rx Arb_A_Rx Arb_B_Rx Speed_Rx Port_Status Transmitter & Receiver Port 1 Bias D[0:7] Ctl[0:1] LReq SClk Cable Media Interface (Driver/Receiver, Arb. Comparator, Port_Status, Speed Monitor) CPS LPS LKON PC[0:2] RESET# TPA1 TPA1# TPB1 TPB1# TPBias1 TPA2 TPA2# TPB2 TPB2# R1 R0 Data Decoder LINK Interface I/O Arbitration and Control State Machine Logic ISO Encoder/ TPBias2 TPBias3 Port 3 (same as Port 1) TPA3 TPA3# TPB3 TPB3# CMC JTAG BUILT-IN SELF TEST TCK TRST# TMS TDI TDO TEST ACCESS PORT Port 2 (same as Port 1) TESTENABLE TESTMODE LACT PDISABLE CLK24/QX0 SCO[2:0] SCI[2:0] QX1 2 |
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