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LP1071 数据表(PDF) 19 Page - Freescale Semiconductor, Inc

部件名 LP1071
功能描述  802.11a/b/g Baseband System
PDF  32 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

LP1071 数据表(HTML) 19 Page - Freescale Semiconductor, Inc

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Pinout and Footprint
LP1071 Advance Information, Rev. 0.5
Freescale Semiconductor
19
PRELIMINARY
ARM_GPIO4
pdb04dgz
bi-dir
General Purpose I/O
M3
ARM_GPIO5
pdb04dgz
bi-dir
General Purpose I/O
M4
ARM_GPIO6
pdb04dgz
bi-dir
General Purpose I/O
K5
ARM_GPIO7
pdb04dgz
bi-dir
General Purpose I/O
L5
ARM_UART_0_DI
pdb04dgz
Input
UART input data.
K6
ARM_UART_0_DO
pdb04dgz
output
UART output data.
M6
ARM_EEPROM_DAT_GPIO
pdb04dgz
bi-dir
General Purpose I/O dedicated for EEPROM.
L6
ARM_EEPROM_CLK_GPIO
pdb04dgz
bi-dir
General Purpose I/O dedicated for EEPROM.
K7
SDIO Signals (other signals on interface are 1 Vdd and 2 Vss pins)
CD/DAT3 (connector pin 1)
pduw04dgz
bi-dir
card detect/data 3.
J1
DAT[2] (connector pin 9)
pdu04dgz
bi-dir
data 2.
J2
DAT[1] (connector pin 8)
pdu04dgz
bi-dir
data 1/interrupt.
J3
DAT[0] (connector pin 7)
pdu04dgz
bi-dir
data 0/busy indication.
K2
CMD (connector pin 2)
pdu04dgz
bi-dir
command/response.
K3
CLK (connector pin 5)
pdisdgz
input
clock
L1
AFE Interface
AGND
pdiana2p
N/A
Analog ground
D6
AGNDIQADC
pdiana2p
N/A
Analog ground
D7
AGNDIQDAC_1
pdiana2p
N/A
Analog ground
A6
AGNDREF
pdiana2p
N/A
Analog Reference negative supply
AVDD
pdiana2p
N/A
Analog 3.3 volt
B3
AVDDIQADC
pdiana2p
N/A
Analog 3.3 volt
A5
AVDDIQDAC_1
pdiana2p
N/A
Analog 3.3 volt
B7
VDDIQADC
pvdd3p
N/A
3.3 volt power for ESD Diodes
B4
VSSIQADC
pvss3p
N/A
3.3 volt ground for ESD Diodes
C1
VDDIQDAC
pvdd3p
N/A
3.3 volt power for ESD Diodes
F4
DGND
pvss1dgz
N/A
Digital Ground
E4
DVDD
pvdd1dgz
N/A
Digital 1.8 Volt
B1
IBIAS
pdiana2p
N/A
Pin for monitoring or bypassing bias current, flowing
out of the pin to agnd.
A1
VBG
pdiana2p
N/A
Voltage reference pin for decoupling (equal to 1.25 V).
Connect 1 uF (ceramic) + 100 nF (ceramic) to agndref.
C4
VREFN
pdiana2p
input
ADC Negative reference for decoupling
A4
VREFP
pdiana2p
input
ADC Positive reference for decoupling
C6
AUXADCIN_0
pdiana2p
input
Muxed analog input to auxiliary ADC bit 0
D4
Table 9. Pin Description (continued)
Pad Name
Pad Type
Direction
Description
Pin



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