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LP1071 数据表(PDF) 20 Page - Freescale Semiconductor, Inc |
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LP1071 数据表(HTML) 20 Page - Freescale Semiconductor, Inc |
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20 / 32 page  LP1071 Advance Information, Rev. 0.5 20 Freescale Semiconductor PRELIMINARY Pinout and Footprint AUXADCIN_1 pdiana2p input Muxed analog input to auxiliary ADC bit 1 C3 AUXADCIN_2 pdiana2p input Muxed analog input to auxiliary ADC bit 2 A2 IADCINN pdiana2p input Negative input of I-ADC C7 IADCINP pdiana2p input Positive input of I-ADC B6 QADCINN pdiana2p input Negative input of Q-ADC C5 QADCINP pdiana2p input Positive input of Q-ADC D5 RSSIADCIN pdiana2p input RSSI ADC input C2 VOCM pdiana2p input Input pin for definition of IQDAC output common-mode level B8 AUXDACOUT pdiana2p output Auxiliary DAC output B2 IDACOUTP pdiana2p output Positive output of I-DAC C8 IDACOUTN pdiana2p output Negative output of I-DAC A7 QDACOUTP pdiana2p output Positive output of Q-DAC A8 QDACOUTN pdiana2p output Negative output of Q-DAC C9 EXT_BIAS pdiana2p input External Bias for test D3 TCXO Squarer AVDD_TCXO pvdd3p N/A Analog 3.3 volt F1 AVSS_TCXO pvss3p N/A Analog ground G2 CLKIN pdiana2p input TCXO reference clock input F2 RF Interface Signals RF_ANALOG_LDO pdb04dgz bi-dir LDO enable for RF VCO power. Driven by PHY controller. L9 RF_EN pdb04dgz bi-dir RF enable. Driven by PHY controller. L10 RF_RXEN pdb04dgz bi-dir RF Rx enable. Driven by PHY controller. M9 RF_TXEN pdb04dgz bi-dir RF Tx enable. Driven by PHY controller. M10 RF_PAEN1 pdb04dgz bi-dir RF PA enable 1. Driven by PHY controller. L12 RF_PAEN2 pdb04dgz bi-dir RF PA enable 2. Driven by PHY controller. K11 RF_SPARE1 pdb04dgz bi-dir RF spare 1 (not used). Driven by PHY controller. J10 RF_VGA6 pdb04dgz bi-dir RF VGA setting. Driven by UWA K12 RF_VGA5 pdb04dgz bi-dir RF VGA setting. Driven by UWA. J12 RF_VGA4 pdb04dgz bi-dir RF VGA setting. Driven by UWA. J11 RF_VGA3 pdo02cdg output RF VGA setting. Driven by UWA. H12 RF_VGA2 pdo02cdg output RF VGA setting. Driven by UWA. H10 RF_VGA1 pdo02cdg output RF VGA setting. Driven by UWA. H11 RF_VGA0 pdo02cdg output RF VGA setting. Driven by UWA. G10 Table 9. Pin Description (continued) Pad Name Pad Type Direction Description Pin |
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