ST72411R datasheet(15/71 Pages) STMICROELECTRONICS

15 / 71 page

ST72411R

15/71

3 SUPPLY, RESET AND CLOCK MANAGEMENT

The ST72411 microcontroller includes a range of

utility features for securing the application in criti-

cal situations (for example in case of a power

brown-out), and reducing the number of external

components.

Main Features

VDD Low Voltage Detection and Supervisor

(LVDS)

Reset Sequence Manager

Main Clock Controller System (MCC)

3.1

LOW

VOLTAGE

DETECTOR

AND

SUPERVISOR (LVDS)

The LVDS consists of three main blocks:

– Low Voltage Detector (LVD)

– Open Power Supply Detection (OPSD)

– Power Supply Supervisor (PSS)

If the internal oscillator is selected (OSC_SEL pin

is tied to VSS), the LVDS, OPSD and PSS func-

tions are always enabled.

If an external clock is selected (OSC_SEL tied to

VDD), the LVDS, OPSD and PSS are disabled

while the external RESET is low and during the

first 260 clock cycles (fCPU). They become ena-

bled after this period. Refer to Figure 13. This

means an external reset circuit must be provided.

However, after this period the LVDS may generate

a reset if a power voltage drop occurs.

3.1.1 Low Voltage Detector

To allow the integration of power management

features in the application, the Low Voltage Detec-

tor function (LVD) generates a static reset when

the VDD supply voltage is below a VIT+ reference

value (positive-going input threshold voltage). This

means that it secures the power-up as well as the

power-down by keeping the ST7 in reset state.

The VIT- reference value (negative-going input

threshold voltage) for a voltage drop is lower than

the VIT+ reference value for power-on in order to

avoid a parasitic reset when the MCU starts run-

ning and sinks current on the supply (hysteresis).

The LVD Reset circuitry generates a reset when

VDD is below:

–VIT+ when VDD is rising

–VIT- when VDD is falling

The LVD function is illustrated in Figure 7.

Provided the minimum VDD value (guaranteed for

the oscillator frequency) is below VIT-, the MCU

can only be in one of two modes:

– Under full software control

– In static safe reset

In this condition, secure operation is always en-

sured for the application without the need for ex-

ternal reset hardware.

The LVD filters spikes on VDD larger than tg(VDD) to

avoid parasitic resets.

3.1.2 Open Power Supply Detection (OPSD)

The purpose of the Open Power Supply Detection

function is to detect if the VDD power circuit is

open.

It detects if the microcontroller is about to be pow-

ered down, to allow software to shutdown the ap-

plication properly before the Power Down Reset

generate by the LVDS.

The system is based on a comparison between

VREF and VDD.VREF is an analog input which is in-

tended to be directly connected to the power

source (see Figure 8).

The detection is not dependent on the MCU con-

sumption (not dependent on the voltage drop due

to the internal resistor of the power source).

To avoid spurious setting of the Power Down Flag

due to possible noise (PDF bit in the MISCR regis-

ter), a margin M is factored into the comparison.

The detection is done if:

(VREF -VDD)>M

The PDF flag can be used to monitor the main

supply supervisor function as shown in Figure 9.

When (VREF -VDD) > M, the PDF flag is set and an

interrupt is generated if the PDIE bit in the MISCR

gram to detect and manage the VDD drop accord-

ing to the application before the reset generated

by the LVDS (See Figure 9).

See the Miscellaneous register chapter for more

details on the PDF and PDIE bits.

3.1.3 Power Supply Supervisor (PSS)

The Power Supply Supervisor function compares

the Power Supply to a fixed analog reference volt-

age (VPSS) (see Figure 10). The output of this

comparator is directly connected to the PSSF bit in

the MISCR register (read only bit).

This feature can be used to monitor the power

supply.

ST72411R 数据表(PDF) 15 Page - STMicroelectronics

ST72411R 数据表(HTML) 15 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71

数据表下载