ST72411R datasheet(37/71 Pages) STMICROELECTRONICS

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ST72411R

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8-BIT TIMER (Cont’d)

5.3.4.3 Event counter mode

(TOUT = “0”, DOUT = “0”)

Figure 27. fTIMER Clock in Event Counter Mode

In this mode, the TIMIO pin is the input clock of the

Timer prescaler which is decremented on every

rising edge of the input clock (allowing event

count). See Figure 41 and Figure 42.

This mode is selected by clearing the TOUT bit in

the TSCR register (i.e. as input) and clearing the

DOUT bit.

Figure 28. Event Counter Mode Operation

5.3.4.4 Output mode

(TOUT = “1”, DOUT = “data out”)

Figure 29. Output Mode Control

In Output mode, the TIMIO pin is connected to the

DOUT latch, hence the Timer prescaler is clocked

by the prescaler clock input (fCPU/16). See Figure

43.

The user can select the desired prescaler division

ratio through the PS1 and PS0 bits of the TSCR

the UDF bit in the TSCR. The UDF bit can be test-

ed under program control to perform a timer func-

tion whenever it goes high and has to be cleared

by the user. The low-to-high UDF bit transition is

used to latch the DOUT bit of the TSCR and, if the

OEN bit is set, DOUT is transferred to the TIMIO

pin. This operating mode allows external signal

generation on the TIMIO pin. See Figure 44.

This mode is selected by setting the TOUT bit in

the TSCR register (i.e. as output) and setting the

DOUT bit to output a high level or clearing the

DOUT bit to output a low level

Figure 30. Output Mode Operation

fTIMER

TIMIO

xx1

Counter Value

TIMIO Pin

Value 1

Value 2

xx2

TIMIO

OEN

DOUT

UDF

LATCH

ALTERNATE

FUNCTION

TOUT DOUT

Timer

Function

Applic ation

Event Counter

(input)

External counter clock

source

Gated input

(input)

External Pulse length

measurement

Output “0”

(output)

Output signal

Output “1”

(output)

generation

FFh

Counter

TIMIO Pin

1st downcount :

Default output value is 0

At each underflow

DOUT has to be

copied to the TIMIO

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