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ST72411R 数据表(PDF) 59 Page - STMicroelectronics

部件名 ST72411R
功能描述  8-BIT MCU WITH SMARTCARD INTERFACE, LCD DRIVER, 8-BIT TIMER, SAFE RESET AND SUPPLY MONITORING
PDF  71 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST72411R 数据表(HTML) 59 Page - STMicroelectronics

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RECOMMENDED OPERATING CONDITIONS (Cont’d)
(TA=0 to +70
oC, V
DD-VSS=6V unless otherwise specified)
Notes:
1. CPU running with memory access, all I/O pins in input mode with a static value at VDD or VSS; clock input (OSC1)
driven by external square wave, LVD enabled.
2. All I/O pins in input mode with a static value at VDD or VSS; clock input (OSC1) driven by external square wave, LVD
enabled.
3. WAIT Mode with SLOW Mode selected, LVD enabled. Based on characterisation results, not tested.
4. All I/O pins in input mode with a static value at VDD or VSS, I/O PORT CHARACTERISTICS
T = 0... +70
oC, voltages are referred to V
SS unless otherwise specified:
* Note: Hysteresis voltage between Schmitt trigger switching levels. Based on characterisation results, not tested.
Symbol
Parameter
Conditio ns
Min
Typ.
Max
Unit
IDD
Supply current in RUN mode 1)
fOSC =8 MHz
36
mA
Supply current in SLOW mode 1)
0.4
mA
Supply current in WAIT mode 2)
0.6
mA
Supply current in SLOW WAIT mode 3)
0.3
mA
Supply current in HALT mode, LVD en-
abled.4)
ILOAD = 0mA
300
µA
Supply current in HALT mode LVD dis-
abled.4)
0
µA
I/O PORT PINS
Symbol
Parameter
Condi tions
Min
Typ
Max
Unit
VIL
Input low level voltage
0.3xV
DD
V
VIH
Input high level voltage
0.7xVDD
VHYS
Schmidt trigger voltage hysteresis *
400
mV
VOL
Output low level voltage
for Standard I/O port pins
I=-5mA
1.3
V
I=-2mA
0.4
VOH
Output high level voltage
I=5mA
VDD-1.3
I=2mA
VDD-0.4
IL
Input leakage current
VSS<VPIN<VDD
1
µA
ISV
Static current consumption
Floating input mode
200
RPU
Pull-up equivalent resistor
VIN >VIH
VIN <VIL
20
60
40
120
80
240
K
RPD
Pull-down equivalent resistor (PB6)
VIN >VIH
VIN <VIL
20
60
40
120
80
240
K
tOHL
Output high to low level fall time
for Standard I/O port pins
Cl=50pF
14.8
25
45.6
ns
Output high to low level fall time
for high sink I/O port pins
TBD
TBD
TBD
tOLH
Output L-H rise time
Cl=50pF
14.4
25
45.9
tITEXT
External interrupt pulse time
1
tCPU



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