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STA014 数据表(PDF) 9 Page - STMicroelectronics

部件名 STA014
功能描述  MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM AND SRS WOWO POSTPROCESSING CAPABILITY
PDF  45 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA014 数据表(HTML) 9 Page - STMicroelectronics

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In this mode the fractional part of the PLL is dis-
abled and the audio clocks are generated at
nominal rates. Fig. 6 describes the default
DATA_REQ
signal
behaviour.
Programming
STA014 it is possible to invert the polarity of the
DATA_REQ line (register REQ_POL).
2.4 - STA014 Decoding States
There are three different decoder states: Idle,
Init, and Decode. Commands to change the de-
coding states are described in the STA014 I
2C
registers description.
Idle Mode
In this mode (entered after a S/W or H/W reset)
the decoder is waiting for the RUN command.
This mode should be used to initialize the con-
figuration registers of the device. The DAC con-
nected to STA014 can be initialized during this
mode (set MUTE to 1).
PLAY
MUTE
Clock State
PCM Output
X
0
Not Running
0
X
1
Running
0
Init Mode
"PLAY" and "MUTE" changes are ignored in this
mode. The internal state of the decoder will be
updated only when the decoder changes from the
state "init" to the state "decode". The "init" phase
ends when the first decoded samples are at the
output stage of the device.
Decode Mode
This mode is completely described by the follow-
ing table:
PLAY
MUTE
Clock State
PCM
Output
Decoding
0
0
Not Running
0
No
0
1
Running
0
No
1
0
Running
Decoded
Samples
Yes
1
1
Running
0
Yes
SOURCE SEND DATA TO STA015
DATA_REQ
SOURCE STOPS TRANSMITTING DATA
SOURCE STOPS TRANSMITTING DATA
D00AU1144
Figure 6. DATA_REQ control line
DATA
SOURCE
µP
MPEG
DECODER
IIC
D98AU912
IIC
SDO
SCKT
LRCKT
SERIAL AUDIO INTERFACE
SDI
SCKR
BIT_EN
XTO
DAC
RX
TX
XTI
FILT
PLL
OCLK
SCL
SDA
DATA_REQ
Figure 7. MPEG Decoder Interfaces.
STA014-STA014B-STA014T
9/45



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