| 数据搜索系统,热门电子元器件搜索 |
|
STA014 数据表(PDF) 22 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STA014 数据表(HTML) 22 Page - STMicroelectronics |
|
22 / 45 page ![]() DRB Address: 0x49 (73) Type: R/W Software Reset: 0xFF Hardware Reset: 0xFF MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 Description DRB7 DRB6 DRB5 DRB4 DRB3 DRB2 DRB1 DRB0 OUTPUT ATTENUATION 000 0000 0 NO ATTENUATION 000 0000 1 -1dB 000 0001 0 -2dB ::: :::: : : 011 0000 0 -96dB DRB register is used to re-direct the Right Chan- nel on the Left, or to mix both the Channels. Default value is 0x00, corresponding at the maxi- mum attenuation in the re-direction channel. CHIP_MODE Address: 0x4D (77) Type: R/W Hardware Reset: 0x00 Using this register it’s possible to select which op- eration will be performed by the DSP. Possible values are: 0x00 - MP3 decoding 0x01 - Reserved 0x02 - ADPCM Encoder 0x03 - ADPCM Decoder 0x04 - BYPASS mode The DSP will check for the value of this register right after the RUN command has been issued (refer to RUN register). After that no more checks will be performed: therefore a SOFT_RESET must be generated in order to change the device mode. CRCR Address: 0x4E (78) Type: R/W Software Reset: 0x00 Hardware Reset: 0x00 MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 XXXX XXX CRCEN The CRC register is used to enable/disable the CRC check. If CRC_EN bit is cleared, the CRC value encoded in the bitstream is checked against the hardware one. If a discrepance oc- curs, the current frame is skipped and the de- coder is muted. The ERROR_CODE register is affected with the value 0x01. If CRC_EN bit is set, the result of the CRC check is ignored, but the ERROR_CODE register is nevertheless affected with the value 0x01 if a dis- crepance has occurred. MFSDF_441 Address: 0x50 (80) Type: R/W Software Reset: 0x00 Hardware Reset: 0x00 MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 X X X M4 M3 M2 M1 M0 This register contains the value for the PLL X driver for the 44.1KHz reference frequency. The VCO output frequency, when decoding 44.1KHz bitstream, is divided by (MFSDF_441 +1) PLLFRAC_441_L Address: 0x51 (81) Type: R/W Software Reset: 0x00 Hardware Reset: 0x00 MSB LSB b7 b6 b5 b4 b3 b2 b1 b0 PF7 PF6 PF5 PF4 PF3 PF2 PF1 PF0 STA014-STA014B-STA014T 22/45 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |