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T80C5112-RKFEV 数据表(PDF) 71 Page - ATMEL Corporation |
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T80C5112-RKFEV 数据表(HTML) 71 Page - ATMEL Corporation |
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71 / 97 page  Rev. B - November 10, 2000 71 Preliminary T80C5112 Reset Value = X0X0 0000b Not bit addressable Table 46. IPH0 Register IPH0 - Interrupt Priority High Register (B7h) 7 6 5 4 3 2 1 0 - PPCH - PSH PT1H PX1H PT0H PX0H Bit Number Bit Mnemonic Description 7 - Reserved The value read from this bit is indeterminate. Do not set this bit. 6 PPCH PCA Counter Interrupt Priority level most significant bit PPCH PPC Priority level 0 0 Lowest 01 10 1 1 Highest priority 5 - Reserved The value read from this bit is indeterminate. Do not set this bit. 4 PSH Serial port Priority High bit PSH PS Priority Level 0 0 Lowest 01 10 1 1 Highest 3 PT1H Timer 1 overflow interrupt Priority High bit PT1H PT1 Priority Level 0 0 Lowest 01 10 1 1 Highest 2 PX1H External interrupt 1 Priority High bit PX1H PX1 Priority Level 0 0 Lowest 01 10 1 1 Highest 1 PT0H Timer 0 overflow interrupt Priority High bit PT0H PT0 Priority Level 0 0 Lowest 01 10 1 1 Highest 0 PX0H External interrupt 0 Priority High bit PX0H PX0 Priority Level 0 0 Lowest 01 10 1 1 Highest |
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