T80C5112-RKFEV datasheet(40/97 Pages) ATMEL

40 / 97 page

Rev. B - November 10, 2000

Preliminary

T80C5112

12. Serial Port Interface (SPI)

12.1. Introduction

The Serial Peripheral Interface module (SPI) which allows full-duplex, synchronous, serial communication between

the MCU and peripheral devices, including other MCUs.

12.2. Features

Features of the SPI module include the following:

Full-duplex, three-wire synchronous transfers

Master or Slave operation

Eight programmable Master clock rates

Serial clock with programmable polarity and phase

Master Mode fault error flag with MCU interrupt capability

Write collision flag protection

12.3. Signal Description

Figure 15 shows a typical SPI bus configuration using one Master controller and many Slave peripherals. The bus

is made of three wires connecting all the devices:

Figure 15. Typical SPI bus

The Master device selects the individual Slave devices by using four pins of a parallel port to control the four SS

pins of the Slave devices.

12.3.1. Master Output Slave Input (MOSI)

This 1-bit signal is directly connected between the Master Device and a Slave Device. The MOSI line is used to

transfer data in series from the Master to the Slave. Therefore, it is an output signal from the Master, and an input

signal to a Slave. A byte (8-bit word) is transmitted most significant bit (MSB) first, least significant bit (LSB)last.

Slave 1

MISO

MOSI

SCK

Slave 3

Slave 4

Slave 2

VDD

Master

T80C5112-RKFEV 数据表(PDF) 40 Page - ATMEL Corporation