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T80C5112-RKFEV 数据表(PDF) 18 Page - ATMEL Corporation |
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T80C5112-RKFEV 数据表(HTML) 18 Page - ATMEL Corporation |
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18 / 97 page ![]() 18 Rev. B - November 10, 2000 Preliminary T80C5112 7.6. Registers 7.6.1. PCON: Power configuration register Table 4. PCON Register PCON (S:87h) Power conÞguration Register Reset Value= 0000 0000b 7.7. Port pins The value of port pins in the different operating modes is shown on the figure below. Table 5. Pin Conditions in Special Operating Modes 7 6 5 4 3 2 1 0 SMOD1 SMOD0 RSTD POF GF1 GF0 PD IDL Bit Number Bit Mnemonic Description 7 SMOD1 Double Baud Rate bit Set to double the Baud Rate when Timer 1 is used and mode 1, 2 or 3 is selected in SCON register. 6 SMOD0 SCON Select bit When cleared, read/write accesses to SCON.7 are to SM0 bit and read/write accesses to SCON.6 are to SM1 bit. When set, read/write accesses to SCON.7 are to FE bit and read/write accesses to SCON.6 are to OVR bit. SCON is Serial Port Control register. 5 RSTD Reset Detector Disable bit Clear to disable the Power-Fail detector. Set to enable the Power-Fail detector. 4 POF Power-Off flag Set by hardware when VDD rises above VRET+ to indicate that the Power Supply has been set off. Must be cleared by software. 3 GF1 General Purpose flag 1 One use is to indicate wether an interrupt occurred during normal operation or during Idle mode. 2 GF0 General Purpose flag 0 One use is to indicate wether an interrupt occurred during normal operation or during Idle mode. 1 PD Power-Down Mode bit Cleared by hardware when an interrupt or reset occurs. Set to activate the Power-Down mode. If IDL and PD are both set, PD takes precedence. 0 IDL Idle Mode bit Cleared by hardware when an interrupt or reset occurs. Set to activate the Idle mode. If IDL and PD are both set, PD takes precedence. Mode Program Memory Port 1 pins Port 3 pins Port 4 pins Reset DonÕt care Weak High Weak High Weak High Idle Internal Data Data Data Power-Down Internal Data Data Data |
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