4 - ANALOG INTERFACE (9 pins)

4.1 - DAC and ADC Positive Reference

This pin provides the Positive Reference Voltage

used by the 16-bit converters. The reference volt-

4.2 - DAC and ADC Negative Reference

This pin provides the Negative Reference Voltage

used by the 16-bit converters, and should be exter-

This output pin is the common mode voltage

with respect to GND.

4.4 - Non-inverting Smoothing Filter Output(OUT+)

This pin is the non-inverting output of the fully

differential analog smoothing filter.

4.5 - Inverting Smoothing Filter Output (OUT-)

This pin is the inverting output of the fully differential

analog smoothing filter. Outputs OUT+ and OUT-

provide analog signals with maximum peak-to-

an external two pole smoothing filter. The external

filter follows the internal single pole switch capaci-

tor filter. The cutoff frequency of the external filter

must be greater than two times the sampling fre-

quency (FS), so that the combined frequency re-

sponse of both the internal and external filters is flat

in the passband . The attenuator of the last output

stage can be programmed to 0dB, 6dB or infinite.

4.6 - Non-inverting Analog Input (IN+)

This pin is the differential non-inverting ADC input.

4.7 - Inverting Analog Input (IN-)

This pin is the differential inverting ADC input.

These analog inputs (IN+, IN-) are presented to the

Sigma-Delta modulator. The analog input peak-to-

peak differential signal range must be less than

single pole anti-aliasing filter. The cut-off frequency

of the filter must be lower than one half the over-

sampling frequency. These filters should be set as

close as possible to the IN+ and IN- pins. The gain

of the first stage is programmable (see Table 3).

4.8 - Non-inverting Auxiliary Analog

Input (AUX IN+)

This pin is the differential non-inverting auxiliary ADC

input. The characteristics are same as the IN+ input.

4.9 - Inverting Auxiliary Analog Input (AUX IN-)

This pin is the differential inverting auxiliary ADC

input. The characteristics are same as the IN- input.

The input pair (IN+/IN- or AUX IN+/AUX IN-) are

software selectable.

PIN DESCRIPTION (continued)

ANALOG

MODULATOR

2nd ORDER

MODULATOR

LOW-PASS

(0.425 x sampling

frequency)

HC0

OUT+

OUT-

V

CM

V

REFN

V

REFP

IN+

IN-

(0 + 6dB in

diff. input)

DAC 1 BIT

First order

differential

switched

capacitor

filter

LOW-PASS

(0.425 x sampling

frequency)

ATTEN.

0dB/+6dB/

INFINITE

M/S

FS

SCLK

DOUT

DIN

CLOCK

GENERATOR

XTALIN

XTALOUT

AGND2

AGND1

AV

DD

DV

DD

DGND

STLC7550

RESET

PWRDWN

38

16

6

5

9

8

31

20

29

37

36

30

19

18

28

27

15

TS

7

MCM

39

HC1

14

17

4

3

42

41

TSTD1

40

AUXIN+

AUXIN-

26

25

MUX

BLOCK DIAGRAM (TQFP44)

STLC7550

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