| 数据搜索系统,热门电子元器件搜索 |
|
PM6670AS 数据表(PDF) 38 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
PM6670AS 数据表(HTML) 38 Page - STMicroelectronics |
|
38 / 54 page ![]() Device description PM6670AS 38/54 7.3 S3 and S5 power management pins According to DDR2/3 memories supply requirements, the PM6670AS can manage all S0 to S5 system states by connecting S3-S5 pins to their respective sleep-mode signals in the notebook's motherboard. Keeping S3 and S5 high, the S0 (Full-On) state is decoded and the outputs are alive. In S3 state (S5 = 1, S3 = 0), the PM6670AS maintains VDDQ and VTTREF outputs active and VTT output in high-impedance as needed. In S4/S5 states (S5 = S3 = 0) all outputs are turned off and, according to DSCG pin voltage, the proper soft-end is performed. Table 4. S3 and S5 Sleep-states decoding S3 S5 System State VDDQ VTTREF VTT 1 1 S0 (Full-On) OnOnOn 0 1 S3 (Suspend-To-RAM) On On Off (Hi-Z) 0 0 S4/S5 (Suspend-To-Disk) Off (Discharge) Off (Discharge) Off (Discharge) |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |