STPCCLIENT datasheet(19/48 Pages) STMICROELECTRONICS

19 / 48 page

PIN DESCRIPTION

Issue 1.7 - February 8, 2000

19/48

ISAOE#

Bidirectional OE Control. This signal con-

trols the OE signal of the external transceiver that

connects the IDE DD bus and ISA SA bus.

GPIOCS#

I/O General Purpose Chip Select 1.

This output signal is used by the external latch on

ISA bus to latch the data on the SD[7:0] bus. The

latch can be used by the PMU unit to control the

external peripheral devices to power down or any

other desired function.

This pin is also serves as a strap input during re-

set.

2.2.9.

IDE CONTROL

PIRQ

Primary Interrupt Request. Interrupt request

from primary IDE channel.

SIRQ

Secondary Interrupt Request. Interrupt re-

quest from secondary IDE channel.

PDRQ

Primary DMA Request. DMA request from

primary IDE channel.

SDRQ

Secondary DMA Request. DMA request

from secondary IDE channel.

PDACK#

Primary DMA Acknowledge. DMA ac-

knowledge to primary IDE channel.

SDACK#

Secondary DMA Acknowledge. DMA

acknowledge to secondary IDE channel.

PIOR#

Primary I/O Read. Primary channel read.

Active low output.

PIOW#

Primary I/O Write. Primary channel write.

Active low output.

SIOR#

Secondary I/O Read. Secondary channel

read. Active low output.

SIOW#

Secondary I/O Write. Secondary channel

write. Active low output.

2.2.10. X-BUS INTERFACE PINS / IDE DATA

RMRTCCS# / DD[15]

ROM/Real Time Clock Chip

Select. This pin is a multi-function pin. When

ISAOE# is active, this signal is used as RM-

RTCCS#. This signal is asserted if a ROM access

is decoded during a memory cycle. It should be

combined with MEMR# or MEMW# signals to

properly access the ROM. During an I/O cycle,

this signal is asserted if access to the Real Time

Clock (RTC) is decoded. It should be combined

with IOR#+ or IOW# signals to properly access the

real time clock.

When ISAOE# is inactive, this signal is used as

IDE DD[15] signal.

This signal must be ORed externally with ISAOE#

and is then connected to ROM and RTC. An

LS244 or equivalent function can be used if OE# is

connected to ISAOE# and the output is provided

with a weak pull-up resistor.

KBCS# / DD[14]

Keyboard Chip Select. This pin

is a multi-function pin. When ISAOE# is active,

this signal is used as KBCS#. This signal is assert-

ed if a keyboard access is decoded during a I/O

cycle.

When ISAOE# is inactive, this signal is used as

IDE DD[14] signal.

This signal must be ORed externally with ISAOE#

and is then connected to the keyboard. An LS244

or equivalent function can be used if OE# is con-

nected to ISAOE# and the output is provided with

a weak pull-up resistor.

RTCRW# / DD[13]

Real Time Clock RW. This pin

is a multi-function pin. When ISAOE# is active,

this signal is used as RTCRW#. This signal is as-

serted for any I/O write to port 71H.

When ISAOE# is inactive, this signal is used as

IDE DD[13] signal.

This signal must be ORed externally with ISAOE#

and then connected to the RTC. An LS244 or

equivalent function can be used if OE# is connect-

ed to ISAOE# and the output is provided with a

weak pull-up resistor.

RTCDS# / DD[12]

Real Time Clock DS. This pin is

a multi-function pin. When ISAOE# is active, this

signal is used as RTCDS. This signal is asserted

for any I/O read to port 71H.

When ISAOE# is inactive, this signal is used as

IDE DD[12] signal.

This signal must be ORed externally with ISAOE#

and is then connected to RTC. An LS244 or equiv-

alent function can be used if OE# is connected to

ISAOE# and the output is provided with a weak

pull-up resistor.

2.2.11. IPC

IRQ_MUX[3:0]

Multiplexed Interrupt Request.

These are the ISA bus interrupt signals. They are

to be encoded before connection to the STPC Cli-

ent using ISACLK and ISACLKX2 as the input se-

lection strobes.

Note that IRQ8B, which by convention is connect-

ed to the RTC, is inverted before being sent to the

interrupt controller, so that it may be connected di-

rectly to the IRQ pin of the RTC.

PCI_INT[3:0]

PCI Interrupt Request. These are

the PCI bus interrupt signals. They are to be en-

coded before connection to the STPC Client using

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