M24M01-R, M24M01-W, M24M01-HR

Device operation

13/36

3.5

Memory addressing

To start communication between the bus master and the slave device, the bus master must

initiate a Start condition. Following this, the bus master sends the device select code, shown

in Table 2 (on Serial Data (SDA), most significant bit first).

The device select code consists of a 4-bit device type identifier, and a 2-bit Chip Enable

“Address” (E2, E1). To address the memory array, the 4-bit device type identifier is 1010b.

unique 2-bit code on the Chip Enable (E1, E2) inputs. When the device select code is

received, the device only responds if the Chip Enable Address is the same as the value on

the Chip Enable (E1, E2) inputs.

If a match occurs on the device select code, the corresponding device gives an

the device select code, it deselects itself from the bus, and goes into Standby mode.

Table 5.

Operating modes

Mode

RW bit

1.

Bytes

Initial sequence

Current Address Read

1

X

1

Start, device select, RW = 1

Random Address Read

0X

1

Start, device select, RW = 0, Address

1

X

reStart, device select, RW = 1

Sequential Read

1

X

≥ 1

Similar to Current or Random Address Read

Byte Write

0

V

IL

1

Start, device select, RW = 0

Page Write

0

V

IL

≤256

Start, device select, RW = 0