DC and AC parameters

M24M01-R, M24M01-W, M24M01-HR

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Table 13.

AC characteristics at 400 kHz (M24M01-R and M24M01-W)

Test conditions specified in Table 7 and Table 8

Symbol

Alt.

Parameter

Min.

Max.

Unit

Clock frequency

400

kHz

Clock pulse width high

600

ns

Clock pulse width low

1300

ns

(1)

1.

Input rise/fall time values recommended by the I²C-bus specification in Standard mode (100 kHz mode).

The M24xxx devices accept these maximum input rise/fall times when running at a higher clock frequency

provided that these rise/fall times are compatible with all the other timing conditions defined in this AC

table.

Input signal rise time

1000

ns

(1)

Input signal fall time

300

ns

(2)

2.

The SDA(out) rise time is not defined by the M24xxx, it is defined by the application pull-up resistor

(connected on the SDA line) and, therefore, it is not specified in this table.

SDA (out) fall time

20

120

ns

100

ns

0

ns

Data out hold time

200

ns

(3)(4)

3.

To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or

rising edge of SDA.

4.

Clock low to next data valid (access time)

200

900

ns

(5)

5.

For a reStart condition, or following a Write cycle.

600

ns

600

ns

600

ns

Time between Stop condition and next Start

condition

1300

ns

Write time

5

ms

(6)

6.

Characterized only, not tested in production.

Pulse width ignored (input filter on SCL and

SDA)

100

ns