M24M01-R, M24M01-W, M24M01-HR

DC and AC parameters

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Table 14.

AC characteristics at 1 MHz (M24M01-HR)

Test conditions specified in Table 7

Symbol

Alt.

Parameter

Min.

Max.

Unit

Clock frequency

0

1

MHz

Clock pulse width high

300

-

ns

Clock pulse width low

400

-

ns

(1)

1.

Input rise/fall time values recommended by the Fast-mode Plus I²C-bus specification. The M24xxx devices

accept longer input rise/fall times provided that these rise/fall times are compatible with all other timing

conditions defined in this AC table.

Input signal rise time

-

300

ns

(1)

Input signal fall time

-

120

ns

(2)(3)

2.

Characterized only, not tested in production.

3.

The SDA(out) rise time is not defined by the M24xxx, it is defined by the application pull-up resistor

(connected on the SDA line) and, therefore, it is not specified in this table.

SDA (out) fall time

-

120

ns

Data in setup time

80

-

ns

0

-

ns

Data out hold time

50

-

ns

(4)(5)

4.

To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or

rising edge of SDA.

5.

Clock low to next data valid (access time)

50

500

ns

(6)

6.

For a reStart condition, or following a Write cycle.

Start condition setup time

250

-

ns

250

-

ns

250

-

ns

Time between Stop condition and next

Start condition

500

-

ns

Write time

-

5

ms

tNS

(2)

Pulse width ignored (input filter on SCL

and SDA)

-50

ns