HD6417618 datasheet(386/646 Pages) RENESAS

部件名	HD6417618

功能描述	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

PDF	646 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

标志

386 / 646 page

Section 14 Serial Communication Interface with FIFO (SCIF)

Rev. 6.00 Jun. 12, 2007 Page 354 of 610

REJ09B0131-0600

Bit

Bit Name

Initial

value

R/W

Description

RTRG1

RTRG0

R/W

Receive FIFO Data Trigger

Set the specified receive trigger number. The receive

data full (RDF) flag in the serial status register (SCFSR)

is set when the number of receive data stored in the

receive FIFO register (SCFRDR) exceeds the specified

trigger number shown below.

• Asynchronous mode

00: 1

01: 4

10: 8

11: 14

• Synchronous mode

00: 1

01: 2

10: 8

11: 14

TTRG1

TTRG0

R/W

Transmit FIFO Data Trigger 1 and 0

Set the specified transmit trigger number. The transmit

FIFO data register empty (TDFE) flag in the serial

status register (SCFSR) is set when the number of

transmit data in the transmit FIFO data register

(SCFTDR) becomes less than the specified trigger

number shown below.

00: 8 (8)*

01: 4 (12)*

10: 2 (14)*

11: 0 (16)*

Note: * Values in parentheses mean the number of

remaining bytes in SCFTDR when the TDFE

flag is set to 1.

HD6417618 数据表(PDF) 386 Page - Renesas Technology Corp

HD6417618 数据表(HTML) 386 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载