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HD6417618 数据表(PDF) 250 Page - Renesas Technology Corp |
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HD6417618 数据表(HTML) 250 Page - Renesas Technology Corp |
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250 / 646 page ![]() Section 10 Power-Down Modes Rev. 6.00 Jun. 12, 2007 Page 218 of 610 REJ09B0131-0600 10.3.1 Standby Control Register (STBCR) STBCR is an 8-bit readable/writable register that specifies the state of the power-down mode. Bit Bit Name Initial Value R/W Description 7 STBY 0 R/W Standby Specifies transition to software standby mode. 0: Executing SLEEP instruction makes this LSI sleep mode 1: Executing SLEEP instruction makes this LSI software standby mode 6 to 4 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 3 MDCHG 0 R/W MD2 to MD0 Pin Control Specifies whether or not the values of pins MD2 to MD0 are reflected in software standby mode. The values of pins MD2 to MD0 are reflected at returning from software standby mode by an interrupt when the MDCHG bit has been set to 1. 0: The values of pins MD2 to MO0 are not reflected in software standby mode. 1: The values of pins MD2 to MD0 are reflected in software standby mode. 2 to 0 All 0 R Reserved These bits are always read as 0. The write value should always be 0. |
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