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PCM1795DB 数据表(PDF) 39 Page - Texas Instruments |
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PCM1795DB 数据表(HTML) 39 Page - Texas Instruments |
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39 / 58 page ![]() I OUT- Circuit (1) I OUTL (Pin26) - OUT+ 1 2 3 BalancedOut OUT- I OUTL+(Pin25) I OUTR+(Pin17) I OUTR (Pin18) - I OUT- I + OUT I + OUT Circuit (1) APPLICATION FOR EXTERNAL DIGITAL FILTER INTERFACE DATA BCK SCK WDCK (WordClock) ExternalFilterDevice DATA 5 6 7 BCK SCK ZEROL 1 2 3 4 ZEROR MSEL LRCK PCM1796 DFMS=0 BCK SCK WDCK(WordClock) ExternalFilterDevice DATA BCK SCK ZEROL 5 6 7 1 2 3 4 ZEROR MSEL LRCK PCM1796 DFMS=1 DATA_L DATA_R PCM1795 www.ti.com ........................................................................................................................................................................................................ SLES248 – MAY 2009 (1) Circuit corresponds to Figure 52. Figure 54. Measurement Circuit for Monaural Mode Figure 55 shows the connection diagram for an external digital filter. Figure 55. Connection Diagram for External Digital Filter (Internal DF Bypass Mode) Application Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Link(s): PCM1795 |
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