PCM1795DB datasheet(21/58 Pages) TI

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External Digital Filter Interface and Timing

Direct Stream Digital (DSD) Format Interface and Timing

TDMCA Interface

FUNCTION DESCRIPTIONS

Zero Detect

SERIAL CONTROL INTERFACE

SPI Interface

PCM1795

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The PCM1795 supports an external digital filter interface that consists of a three- or four-wire synchronous serial

port that allows the use of an external digital filter. External filters include the Texas Instruments’ DF1704 and

DF1706, the Pacific Microsonics PMD200, or a programmable digital signal processor.

In the external DF mode, LRCK (pin 4), BCK (pin 6) and DATA (pin 5) are defined as: WDCK, the word clock;

BCK, the bit clock; and DATA, the monaural data. The external digital filter interface is selected by using the

DFTH bit of control register 20, which functions to bypass the internal digital filter of the PCM1795.

When the DFMS bit of control register 19 is set, the PCM1795 can process stereo data. In this case, ZEROL (pin

1) and ZEROR (pin 2) are defined as left-channel data and right-channel data input, respectively.

Detailed information for the external digital filter interface mode is provided in the Application For External Digital

Filter Interface section.

The PCM1795 supports the DSD format interface operation, which includes out-of-band noise filtering using an

internal analog FIR filter. For DSD operation, SCK (pin 7) is redefined as BCK, DATA (pin 5) as DATAL (left

channel audio data), and LRCK (pin 4) as DATAR (right channel audio data). BCK (pin 6) must be forced low in

the DSD mode. The DSD format interface is activated by setting the DSD bit of control register 20.

Detailed information for the DSD mode is provided in the Application For DSD Format (DSD Mode) Interface

section.

The PCM1795 supports the time-division-multiplexed command and audio (TDMCA) data format to enable

control of and communication with a number of external devices over a single serial interface.

Detailed information for the TDMCA format is provided in the TDMCA Interface Format section.

The PCM1795 has a zero-detect function. When the PCM1795 detects the zero conditions as shown in Table 6,

the PCM1795 sets ZEROL (pin 1) and ZEROR (pin 2) high.

Table 6. Zero Conditions

MODE

DETECTING CONDITION AND TIME

PCM

DATA is continuously low for 1024 LRCKs.

External DF mode

DATA is continuously low for 1024 WDCKs.

There are an equal number of 1s and 0s in every 8 bits of DSD input data for 23

DZ0

ms.

DSD

DZ1

The input data are continuously 1001 0110 for 23 ms.

The PCM1795 supports both SPI and I2C interfaces that set the mode control registers; see Table 9. The serial

control interface is selected by MSEL (pin 3); SPI is activated when MSEL is set low, and I2C is activated when

MSEL is set high.

The SPI interface is a four-wire synchronous serial port that operates asynchronously to the serial audio interface

and the system clock (SCK). The serial control interface is used to program and read the on-chip mode registers.

The control interface includes MDO (pin 13), MDI (pin 11), MC (pin 12), and MS (pin 10). MDO is the serial data

output, used to read back the values of the mode registers; MDI is the serial data input, used to program the

mode registers; MC is the serial bit clock, used to shift data in and out of the control port; and MS is the mode

control enable, used to enable the internal mode register access.

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