PCM1795DB datasheet(7/58 Pages) TI

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PIN CONFIGURATION

ZEROL

ZEROR

MSEL

LRCK

DATA

BCK

SCL

DGND

MDI

MDO

RST

AGND3L

L-

OUT

L+

OUT

AGND2

COM

REF

AGND1

R-

OUT

R+

OUT

AGND3R

PCM1795

www.ti.com ........................................................................................................................................................................................................ SLES248 – MAY 2009

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SSOP-28

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Table 1. TERMINAL FUNCTIONS

TERMINAL

NAME

NO.

I/O

DESCRIPTION

AGND1

—

Analog ground (internal bias)

AGND2

—

Analog ground (internal bias)

AGND3L

—

Analog ground (left channel DACFF)

AGND3R

—

Analog ground (right channel DACFF)

BCK

Bit clock input(1)

DATA

Serial audio data input(2)

DGND

—

Digital ground

IOUTL+

Left channel analog current output+

IOUTL–

Left channel analog current output–

IOUTR+

Right channel analog current output+

IOUTR–

Right channel analog current output–

IREF

—

Output current reference bias pin

LRCK

Left and right clock (fS) input

(2)

Mode control clock input(2)

MDI

Mode control data input(2)

MDO

I/O

Mode control readback data output(3)

I/OI

Mode control chip-select input(4); active low

MSEL

I2C/SPI select(2); active low SPI select

RST

Reset(2); active low

(1)

Schmitt-trigger input, 5-V tolerant.

(2)

Schmitt-trigger input, 5-V tolerant.

(3)

Schmitt-trigger input and output. 5-V tolerant input. In I2C mode, this pin becomes an open-drain 3-state output; otherwise, this pin is a

CMOS output.

(4)

Schmitt-trigger input and output. 5-V tolerant input and CMOS output.

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