MPC8378CVRALGA datasheet(28/126 Pages) FREESCALE

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MPC8378E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

Ethernet: Enhanced Three-Speed Ethernet (eTSEC)

8.3.1.1

SGMII Transmit AC Timing Specifications

Table 27 provides the SGMII transmit AC timing targets. Source synchronous clocking is not supported.

8.3.1.2

SGMII Receive AC Timing Specifications

Table 28 provides the SGMII receive AC timing specifications. Source synchronous clocking is not

supported; the clock is recovered from the data.

Table 27. SGMII Transmit AC Timing Specifications

At recommended operating conditions with XVDD_SRDS = 1.0 V ± 5%.

Parameter

Symbol

Min

Typical

Max

Unit

Notes

Deterministic Jitter

—

0.17

UIp-p

—

Total Jitter

—

0.35

UIp-p

—

Unit Interval

799.92

800

800.08

VOD fall time (80%-20%)

tfall

—

120

—

VOD rise time (20%-80%)

trise

—

120

—

Notes:

1 Each UI is 800 ps ± 100 ppm.

Table 28. SGMII Receive AC Timing Specifications

At recommended operating conditions with XVDD_SRDS = 1.0 V ± 5%.

Parameter

Symbol

Min

Typical

Max

Unit

Notes

Deterministic jitter tolerance

0.37

—

UIp-p

Combined deterministic and random jitter tolerance

JDR

0.55

—

UIp-p

Sinusoidal jitter tolerance

JSIN

0.1

—

UIp-p

Total jitter tolerance

0.65

—

UIp-p

Bit error ratio

BER

—

10-12

——

Unit interval

799.92

800

800.08

AC-coupling capacitor

CTX

—

200

Note:

1 Measured at the receiver.

2 Each UI is 800 ps ± 100 ppm.

3 The external AC coupling capacitor is required. It’s recommended to be placed near the device transmitter outputs.

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