HT83F40P datasheet(20/61 Pages) HOLTEK

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HT83FXX

Rev. 1.00

May 12, 2009

Timers

The provision of timers form an important part of any

microcontroller, giving the designer a means of carrying

out time related functions. These devices contain two

count up timers of 8-bit capacity. The provision of an in-

ternal prescaler to the clock circuitry of the timer gives

added range to the timer.

There are two types of register related to each Timer.

The first is the register that contains the actual value of

the timer and into which an initial value can be

preloaded. Reading from this register retrieves the con-

tents of the Timer. All devices can have the timer clock

configured to come from the internal clock source.

Configuring the Timer Input Clock Source

The clock source for the 8-bit timers is the system clock

divided by four. The 8-bit timer clock source is also first di-

vided by a, the division ratio of which is conditioned by the

three lower bits of the associated timer control register.

Timer Registers

- TMR0, TMR1

The timer registers are special function registers located

in the special purpose Data Memory and is the place

where the actual timer value is stored. All devices con-

tain two 8-bit timers, whose registers are known as

TMR0 and TMR1. The value in the timer registers in-

creases by one each time an internal clock pulse is re-

ceived. The timer will count from the initial value loaded

by the preload register to the full count of FFH for the

8-bit timer at which point the timer overflows and an in-

ternal interrupt signal is generated. The timer value will

then be reset with the initial preload register value and

continue counting.

Note that to achieve a maximum full range count of FFH

for the 8-bit timer, the preload registers must first be

cleared to all zeros. It should be noted that after

power-on, the preload registers will be in an unknown

condition. Note that if the Timer Counters are in an OFF

condition and data is written to their preload registers,

this data will be immediately written into the actual coun-

ter. However, if the counter is enabled and counting, any

new data written into the preload data register during

this period will remain in the preload register and will

only be written into the actual counter the next time an

overflow occurs. Note also that when the timer registers

are read, the timer clock will be blocked to avoid errors,

however, as this may result in certain timing errors, pro-

grammers must take this into account.

Timer Control Registers

- TMR0C, TMR1C

Each timer has its respective timer control register,

known as TMR0C and TMR1C. It is the timer control

that control the full operation of the timers. Before the

timers can be used, it is essential that the appropriate

timer control register is fully programmed with the right

data to ensure its correct operation, a process that is

normally carried out during program initialization. Bits 7

and 6 of the Timer Control Register, must be set to the

required logic levels. Bit 6 of the registers must always

be wriiten with a

²1², and bit 7 must always be written

with a

²0². The timer-on bit, which is bit 4 of the Timer

Control Register and known as T0ON/ T1ON, depend-

ing upon which timer is used, provides the basic on/off

control of the respective timer. setting the bit high allows

the timer to run, clearing the bit stops the timer. For the

8-bit timers, which have prescalers, bits 0~2 of the

Timer Control Register determines the division ratio of

the input clock prescaler.

Configuring the Timer

The Timer is used to measure fixed time intervals, pro-

viding an internal interrupt signal each time the Timer

overflows. To do this the Operating Mode Select bit pair

in the Timer Control Register must be set to the

correctvalue as shown.

Control Register Operating Mode

Select Bits

Bit7 Bit6

The internal clock, fSYS, is used as the Timer clock. How-

ever, this clock source is further divided by a prescaler,

the value of which is determined by the Prescaler Rate

Select bits, which are bits 0~2 in the Timer Control Reg-

ister. After the other bits in the Timer Control Register

have been setup, the enable bit, which is bit 4 of the

Timer Control Register, can be set high to enable the

Timer to run. Each time an internal clock cycle occurs,

the Timer increments by one. When it is full and over-

flows, an interrupt signal is generated and the Timer will

T i m e r M o d e C o n t r o l

T 0 O N

T 1 O N

P r e l o a d R e g i s t e r

T i m e r

D a t a B u s

R e l o a d

O v e r f l o w

t o I n t e r r u p t

T 1 P S C 2 ~ T 1 P S C 0

T 0 P S C 2 ~ T 0 P S C 0

8 - B i t C o u n t e r

f S Y S / 4

P r e s c a l e r

( 1 / 2 ~ 1 / 2 5 6 )

T 1 T M 1

T 0 T M 1

T 1 T M 0

T 0 T M 0

8-bit Timer Structure

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