HT83F40P datasheet(24/61 Pages) HOLTEK

24 / 61 page

HT83FXX

Rev. 1.00

May 12, 2009

Serial Interface

The device contains both SPI and I

2C serial interface

functions, which allows two methods of easy communi-

cation with external peripheral hardware. As the SPI and

2C function share the same external pins and internal

registers their function must first be chosen by selecting

the correct configuration option.

SPI Interface

The SPI interface is often used to communicate with ex-

ternal peripheral devices such as sensors, Flash or

EEPROM memory devices etc. Originally developed by

Motorola, the four line SPI interface is a synchronous

serial data interface that has a relatively simple commu-

nication protocol simplifying the programming require-

ments when communicating with external hardware

devices.

· SPI Interface Operation

The SPI interface is a full duplex synchronous serial

data link. Communication between devices con-

nected to the SPI interface is carried out in a

slave/master mode with all data transfer initiations be-

ing implemented by the master. Multiple slave devices

can be connected to the SPI serial bus with each de-

vice controlled using its slave select line. The SPI is a

four line interface with pin names SDI, SDO, SCK and

SCS. Pins SDI and SDO are the Serial Data Input and

Serial Data Output lines, SCK is the Serial Clock line

and SCS is the Slave Select line. As the SPI interface

pins are pin-shared with segment pins and with the I

function pins, the SPI interface must first be enabled

by selecting the correct configuration option. After the

SPI configuration option has been selected it can then

also be selected using the SIMEN bit in the SIMC0

The SPI function in this device offers the following fea-

tures:

¨ Full duplex synchronous data transfer

¨ Both Master and Slave modes

¨ LSB first or MSB first data transmission modes

¨ Transmission complete flag

Several other configuration options also exist to setup

various SPI interface options as follows:

¨ SPI pin enabled

¨ WCOL bit enabled or disabled

¨ CSEN bit enabled or disabled

The status of the SPI interface pins is determined

by a number of factors, whether the device is in

master or slave mode and upon the condition of cer-

tain control bits such as CSEN and SIMEN.

D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0

S I M D R ( R e c e i v e d D a t a R e g i s t e r )

S D O B u f f e r

M L S

D a t a B u s

M a s t e r o r S l a v e

S D I

S D O

I n t e r n a l B a u d R a t e C l o c k

S C K

C l o c k P o l a r i t y

C 2

C 1

C 0

S I M E N

I n t e r n a l B u s y F l a g

S I M E N

W r i t e S I M D R

W C O L F l a g

T R F

a n d , s t a r t

S I M E N

E N

A N D

W r i t e S B D R

W r i t e S I M D R E n a b l e / D i s a b l e

S C S

E N

M a s t e r o r S l a v e

C S E N

S I M E N

a n d , s t a r t

Block Diagram

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