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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ST7713 数据表(PDF) 60 Page - Sitronix Technology Co., Ltd. |
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ST7713 数据表(HTML) 60 Page - Sitronix Technology Co., Ltd. |
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60 / 159 page  ST7713 Ver 1.6 2008-05 60 Fig. 9.9.9 Vertical and horizontal timing of RGB interface Table 9.9.6.2 Vertical and Horizontal Timing for RGB I/F Specification Item Symbol Condition Min Type. Max Unit Vertical Timing Vertical cycle period TVP 134 140 HS Vertical low pulse width TVS 2 4 HS Vertical front porch TVFP 2 4 HS Vertical back porch TVBP 2 4 HS Vertical data start line TVS + TVBP 4 8 HS Vertical blanking period TVBL TVS + TVBP + TVFP 6 12 HS Vertical active area TVDISP 130 HS Vertical refresh rate TVRR Frame rate 61.75 65 68.25 Hz Horizontal Timing Horizontal cycle period THP 152 745 PCLK Horizontal low pulse width THS 2 256 PCLK Horizontal front porch THFP 2 256 PCLK Horizontal back porch THBP 2 256 PCLK Horizontal data start point THS + THBP 30 766 PCLK Horizontal blanking period THBL 32 768 PCLK Horizontal active area THDISP 120 PCLK TPCLKCYC 100 718 ns Pixel clock cycle fPCLKCYC 1.4 10 MHz Note 1. VDDI=1.6 to 3.3V, VDD=2.5 to 3.3V, AGND=DGND=0V, Ta=-30 to 70℃ Note 2. HP is multiples of eight PCLK. |
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