Production Data

WM9704Q

WOLFSON MICROELECTRONICS LTD

PD Rev 2.3 January 2001

31

REGISTER 54h – GPIO PIN STATUS

The GPIO status is a read/write register that reflects the state of all GPIO pins (inputs and outputs)

on slot 12. The value of all GPIO pin inputs and outputs comes in from the codec every frame on slot

12, but is also available for reading as GPIO Pin Status via the standard slot 1 and 2 command

address/data protocols. GPIO inputs configured as Sticky are cleared by writing a 0 to the

corresponding bit of this register 54h.

Bits corresponding to unimplemented GPIO pins should be forced to zero in this register and input

slot 12. GPIO bits that have been programmed as Inputs and Sticky, upon transition either (high-to

low) or (low-to-high) depending on pin polarity, will cause the individual GPIO bit to go asserted 1,

and remain asserted until a write of 0 to that bit. The normal way to set the desired value of a GPIO

output pin is to set the control bit in output slot 12.

The default value, if configured as an input, after cold or register reset for this register is always the

state of the GPIO pin.

REGISTER 56h – MISCELLANEOUS MODEM AFE STATUS/CONTROL

Not supported in this mode.

VENDOR RESERVED REGISTERS (INDEX 5Ah AND 7Ah)

These registers are vendor specific. Do not write to these registers unless the Vendor ID register has

been checked first to ensure that the driver knows the source of the AC‘97 component. Values stored

in this register are used to provide vendor specific modes for the manufacturer.

BIT

NAME

DEFAULT

ACTION WHEN SET TO 1

User bits

AND

ADC no DAC

0

Select stereo mix into ADC as having no DAC

signal

R2S

Rev 2.1 switch

0

Closes Rev 2.1 switch when set (see fig 1)

I

I

0

Enables I

43,44,48

DLM

Dual line modem

0

Selects support for Line2 DAC and ADC slots

AMD

Automute disable

0

Disables automute function on the front and

rear DACs

Table 22 Vendor Register 5Ah Bit Allocation and Default States

VENDOR SPECIFIC GAIN CONTROL REGISTERS – (INDEX 70h TO 74h)

These three registers control the gain and mute functions applied to the front and rear mixer paths,

and the rear channel DAC gains. These PGAs are not accommodated in the Intel specification, but

are required in order to build a flexible quad surround sound device. The function is as per the other

mixer PGAs. However, the default value of the register changes depending upon the MODE the

device is operating in, as shown in Table 23.

DEFAULT VALUE FOR REGISTER

MODE

REAR DAC –

REG 70H

FRONT MIXER –

REG 72H

REAR MIXER –

REG 74H

REV 2.1

SWITCH

Rev 2.1 (00)

8808

0808

8808

Closed

Rev 2.1 6-channel

(01)

8808

0808

8808

Closed

Quad (10)

8808

0808

0808

Open

Table 23 Vendor Specific PGA Default Values

VENDOR ID REGISTERS (INDEX 7Ch TO 7Eh)

This register is for specific vendor identification if so desired. The ID method is Microsoft’s Plug and

Play Vendor ID code. The first character of that ID is F7 to F0, the second character S7 to S0, and

the third T7 to T0. These three characters are ASCII encoded. The REV7 to REV0 field is for the

Vendor Revision number. In WM9704Q the vendor ID is set to WML3 if MODE1 = 0, and WML4 if

MODE1 = 1.

Wolfson is a registered Microsoft Plug and Play vendor.