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数据搜索系统，热门电子元器件搜索 |
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HT82K75R 数据表(PDF) 48 Page - Holtek Semiconductor Inc |
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HT82K75R 数据表(HTML) 48 Page - Holtek Semiconductor Inc |
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48 / 66 page  HT82M75R/HT82M75RE HT82K75R/HT82K75RE Rev. 1.10 48 June 11, 2010 Mnemonic Description Cycles Flag Affected Rotate RRA [m] RR [m] RRCA [m] RRC [m] RLA [m] RL [m] RLCA [m] RLC [m] Rotate Data Memory right with result in ACC Rotate Data Memory right Rotate Data Memory right through Carry with result in ACC Rotate Data Memory right through Carry Rotate Data Memory left with result in ACC Rotate Data Memory left Rotate Data Memory left through Carry with result in ACC Rotate Data Memory left through Carry 1 1 Note 1 1 Note 1 1 Note 1 1 Note None None C C None None C C Data Move MOV A,[m] MOV [m],A MOV A,x Move Data Memory to ACC Move ACC to Data Memory Move immediate data to ACC 1 1 Note 1 None None None Bit Operation CLR [m].i SET [m].i Clear bit of Data Memory Set bit of Data Memory 1 Note 1 Note None None Branch JMP addr SZ [m] SZA [m] SZ [m].i SNZ [m].i SIZ [m] SDZ [m] SIZA [m] SDZA [m] CALL addr RET RET A,x RETI Jump unconditionally Skip if Data Memory is zero Skip if Data Memory is zero with data movement to ACC Skip if bit i of Data Memory is zero Skip if bit i of Data Memory is not zero Skip if increment Data Memory is zero Skip if decrement Data Memory is zero Skip if increment Data Memory is zero with result in ACC Skip if decrement Data Memory is zero with result in ACC Subroutine call Return from subroutine Return from subroutine and load immediate data to ACC Return from interrupt 2 1 Note 1 note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 2 2 2 2 None None None None None None None None None None None None None Table Read TABRDC [m] (4) TABRDC [m] (5) TABRDL [m] Read ROM code (locate by TBLP and TBHP) to data memory and TBLH Read ROM code (current page) to data memory and TBLH Read table (last page) to TBLH and Data Memory 2 Note 2 Note 2 Note None None None Miscellaneous NOP CLR [m] SET [m] CLR WDT CLR WDT1 CLR WDT2 SWAP [m] SWAPA [m] HALT No operation Clear Data Memory Set Data Memory Clear Watchdog Timer Pre-clear Watchdog Timer Pre-clear Watchdog Timer Swap nibbles of Data Memory Swap nibbles of Data Memory with result in ACC Enter power down mode 1 1 Note 1 Note 1 1 1 1 Note 1 1 None None None TO, PDF TO, PDF TO, PDF None None TO, PDF Note: 1. For skip instructions, if the result of the comparison involves a skip then two cycles are required, if no skip takes place only one cycle is required. 2. Any instruction which changes the contents of the PCL will also require 2 cycles for execution. 3. For the ²CLR WDT1² and ²CLR WDT2² instructions the TO and PDF flags may be affected by the execution status. The TO and PDF flags are cleared after both ²CLR WDT1² and ²CLR WDT2² instructions are consecutively executed. Otherwise the TO and PDF flags remain unchanged. 4. Configuration option ²TBHP option² is enabled 5. Configuration option ²TBHP option² is disabled |
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