HT82K75R datasheet(16/66 Pages) HOLTEK

16 / 66 page

HT82M75R/HT82M75RE

HT82K75R/HT82K75RE

Rev. 1.10

June 11, 2010

In addition, on entering an interrupt sequence or execut-

ing a subroutine call, the status register will not be

pushed onto the stack automatically. If the contents of

the status registers are important and if the interrupt rou-

tine can change the status register, precautions must be

taken to correctly save it.

Interrupt Control Registers

- INTC

The microcontroller provides an internal timer/event

counter overflow interrupt. By setting various bits within

this register using standard bit manipulation instruc-

tions, the enable/disable function of each interrupt can

be independently controlled. A master interrupt bit within

this register, the EMI bit, acts like a global enable/dis-

able and is used to set all of the interrupt enable bits on

or off. This bit is cleared when an interrupt routine is en-

tered to disable further interrupt and is set by executing

the

²RETI² instruction.

Timer/Event Counter Registers

TMRH, TMRL, TMRC

All devices possess a single internal 16-bit count-up

timer. An associated register pair known as

TMRL/TMRH is the location where the timer 16-bit value

is located. This register can also be preloaded with fixed

data to allow different time intervals to be setup. An as-

sociated control register, known as TMRC, contains the

setup information for this timer, which determines in

what mode the timer is to be used as well as containing

the timer on/off control function.

Watchdog Timer Register

- WDTS

The Watchdog function in the microcontroller provides

an automatic reset function giving the microcontroller a

means of protection against spurious jumps to incorrect

Program Memory addresses. To implement this, a timer

is provided within the microcontroller which will issue a

reset command when its value overflows.To provide

variable Watchdog Timer reset times, the Watchdog

Timer clock source can be divided by various division ra-

tios, the value of which is set using the WDTS register.

By writing directly to this register, the appropriate divi-

sion ratio for the Watchdog Timer clock source can be

setup. Note that only the lower 3 bits are used to set divi-

sion ratios between 1 and 128.

Input/Output Ports and Control Registers

Within the area of Special Function Registers, the I/O

registers and their associated control registers play a

prominent role. All I/O ports have correspondingly des-

ignated registers known as PA, PB, etc. These labeled

I/O registers are mapped to specific addresses within

the Data Memory as shown in the Data Memory table,

which are used to transfer the appropriate output or in-

put data on that port. With each I/O port there is an asso-

ciated control register known as PAC, PBC, etc., also

mapped to specific addresses with the Data Memory.

Input/Output Ports

Holtek microcontrollers offer considerable flexibility on

their I/O ports. With the input or output designation of ev-

ery pin fully under user program control, pull-high op-

tions for all ports and Wake-up option for all I/O pins, the

user is provided with an I/O structure to meet the needs

of a wide range of application possibilities.

The microcontroller provides 24 or 40 bit bidirectional in-

put/output lines labeled with port names known as PA,

PB, etc. These I/O ports are mapped to the Data Mem-

ory with addresses as shown in the Special Purpose

Data Memory table. All of these I/O lines can be used for

input and output operations and one line as an input

only. For input operation, these ports are non-latching,

which means the inputs must be ready at the T2 rising

edge of instruction

²MOV A,[m]², where m denotes the

port address. For output operation, all the data is latched

and remains unchanged until the output latch is rewritten.

Pull-high Resistors

Many product applications require pull-high resistors for

their switch inputs usually requiring the use of an exter-

nal resistor. To eliminate the need for these external re-

sistors, I/O pins, when configured as an input have the

capability of being connected to an internal pull-high re-

sistor. The pull-high resistors are selectable via configu-

ration options and are implemented using weak PMOS

transistors. The individual pull-high resistor is selected

to be connected to each pin on Port A by a configuration

option. A configuration option can determine if the

pull-high resistors are connected to the lower significant

four pins or higher significant four pins on each I/O port

except Port A.

Port Pin Wake-up

If the HALT instruction is executed, the device will enter

the Power Down Mode, where the system clock will stop

resulting in power being conserved, a feature that is im-

portant for battery and other low-power applications.

Various methods exist to wake-up the microcontroller,

one of which is to change the logic condition on one of

the port pins from high to low. After a HALT instruction

forces the microcontroller into entering the Power Down

Mode, the processor will remain in a low-power state un-

til the logic condition of the selected wake-up pin on the

port pin changes from high to low. This function is espe-

cially suitable for applications that can be woken up via

external switches. All of the I/O pins can be configured

to have the capability to wake-up the device by high to

low and low to high edges using different configuring

ways. It means once the I/O pin is configured to have the

HT82K75R 数据表(PDF) 16 Page - Holtek Semiconductor Inc

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