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MC44CC373CAS 数据表(PDF) 5 Page - Freescale Semiconductor, Inc

部件名 MC44CC373CAS
功能描述  CMOS Audio/Video RF Modulators
PDF  28 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MC44CC373CAS 数据表(HTML) 5 Page - Freescale Semiconductor, Inc

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Freescale Semiconductor
5
MC44CC373
UHF OSCILLATOR-VHF RANGE
For VHF range operation, the UHF oscillator can be inter-
nally divided by: 2, 4, 8, or 16. This is accomplished via the
special test mode bits, X2:X0.
NOTE:
The MC44CC373/374 modulators are intended for
UHF operation. Using the digital dividers for VHF
operation will cause additional spurious content in the
RFOUT. Performance specifications for VHF operation
are not provided. The user must provide external
filtering on RFOUT to meet their VHF spurious
requirements.
SOUND SECTION
The sound oscillator is fully integrated and does not re-
quire any external components. An internal low-pass filter
and matched structure provide very low harmonics levels.
The sound modulator system consists of an FM modulator
incorporating the sound subcarrier oscillator. An AM modula-
tor is also included in the MC44CC373/374xxxx devices and
is enabled by the SYSL control bit for use in system L appli-
cations. The audio input signal is AC-coupled into the ampli-
fier, which then drives the modulators.
The sound reference divider is programmed by control bit
SRF, resulting in a reference frequency of 31.25 kHz or
62.5 kHz. The sound subcarrier frequency is selected by con-
trol bits SFD1:SFD0. The subcarrier frequencies are 4.5, 5.5,
6.0 or 6.5 MHz. The power-up default value is 5.5 MHz.
A capacitor is connected to the external pin, PREEM, to
set the pre-emphasis time constant for the application. Infor-
mation on the selection of this filter may be found later in this
document under applications information.
LOGIC OUTPUT PORT (LOP)
The LOP pin controls any logic function. The primary ap-
plications for the LOP are to control an external attenuator or
an external switch, between the antenna input and TV output.
A typical attenuator application with PIN diode is shown in
Figure 3. The LOP pin switches the PIN attenuator depend-
ing on the signal strength of the Antenna Input. This reduces
the risks of intermodulation in certain areas. The LOP can
also be used as an OFF position bypass switch or for other
logic functions in the application.
Figure 3. Typical Attenuator Application with Pin Diode
VIDEO SECTION - PEAK WHITE CLIP
The modulators require the following for proper video func-
tionality:
A composite video input with negative going sync
pulses
A nominal video level of < 1.14 V
This signal is AC-coupled to the video input where the
sync tip level is clamped.
The video signal is then passed to a Peak White Clip
(PWC) circuit. The PWC circuit function soft-clips the top of
the video waveform, if the sync tip amplitude to peak white
clip goes too high. This avoids carrier over-modulation by the
video.
The Peak White Clip level may be set via the Option Con-
trol Register 2, bits PW1:PW0. Clipping can be disabled by
software via bit PWC in the Control register.
TEST PATTERN GENERATOR
The modulators have a simple test pattern generator, that
may be enabled under I2C bus control, to permit a TV receiv-
er to easily tune to the modulator output. The pattern consists
of two white vertical bars on a black background and a 1 kHz
audio test signal.
The video test pattern consists of two signals generated by
the Digital section. One controls the sync pulse circuitry, and
the other controls the luminance circuitry. These signals are
logic levels that drive the video circuitry which creates a com-
posite signal with the proper levels for sync pulses and lumi-
nance as shown in Figure 4.
Figure 4. Test Pattern Generator
LOP pin
Vcc
TV Out
Antenna
Input
10
20
30
40
50
60
0
64
TE1
24 28
44
TIMEINµS.
7/10
3/10
TE2
4.75
μs



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