MC44CC373CAS datasheet(10/28 Pages) FREESCALE

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MC44CC373

The following rules apply for the sequences of data bytes

for incoming (write) information:

•

If an odd number of data bytes are received, the last

one is ignored.

•

If nine data bytes are received, the ninth and following

ones are ignored, and the last ACK pulse is sent at the

end of the eighth data byte.

•

The optional control register one, most significant and

least significant bytes, OC1M, OC1L, data must

always be sent after the C1,C0 control data without a

stop condition in between.

•

The optional control register two, most significant and

least significant bytes, OC2M, OC2L, data must be

sent directly after the OC1M, OC1L data without a

stop condition in between.

•

The Control and Frequency information may be sent

as separate I2C write sequences. (Example 1 or

Example 5 followed/preceeded by Example 2).

Abbreviations:

STA = Start condition

CA = Chip Address

FM = Frequency information, most significant (high order) bits

FL = Frequency information, least significant (low order) bits

C1 = Control information, most significant (high order) bits

CO = Control information, least significant (low order) bits

OC1M = Optional Control 1 information, most significant (high order) bits

OC1L= Optional Control 1 information, least significant (low order) bits

OC2M = Optional Control 2 information, most significant (high order) bits

OC2L = Optional Control 2 information, least significant (low order) bits

STO = Stop condition

I2C Read Mode Format

To read back the status data, the read address shown in

Table 10 is sent by the master. The modulator then responds

with an ACK followed by a byte containing status information

on the RF oscillator out-of-frequency range.

Table 11. MC44CC373/4 Programming Sequence (Incoming Information)

Legacy Devices Data Bytes

Example 1

STA

STO

Example 2

STA

STO

Example 3

STA

STO

Example 4

STA

STO

MC44CC37xxxxxx Devices using the Option Control Bytes

Example 5

STA

OC1M

OC1L

OC2M

OC2L

STO

Example 6

STA

OC1M

OC1L

OC2M

OC2L

STO

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