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MC44CC373CAS 数据表(PDF) 13 Page - Freescale Semiconductor, Inc

部件名 MC44CC373CAS
功能描述  CMOS Audio/Video RF Modulators
PDF  28 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MC44CC373CAS 数据表(HTML) 13 Page - Freescale Semiconductor, Inc

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MC44CC373
INTER-IC (I2C) INTERFACE TIMING
Figure 5. I2C Timing Diagram
Table 12. I2C Interface Bus Specifications
Parameter
Symbol
Min.
Max.
Units
Low Level Output Voltage
VOL
0
0.4
V
High Level Input Voltage
VIH
0.7VCC
VCCmax+0.5
V
Low Level Input Voltage
VIL
−0.5
0.3 VCC
V
Absolute Max Input Voltage
—
—
5.5
V
Hysteresis of Schmitt trigger inputs
Vhys
0.05VCC
—
V
Capacitance for each I/O pin(1)
1. Cb = total capacitance of one bus line in pF.
CIN
—
10
pF
Pulse width of spikes filtered out
tSP
0
50
nS
SCL Frequency
fSCLK
0
800
kHz
Hold time Start condition
tHD;STA
500
—
nS
Set-up time for repeated start
tSU;STA
500
—
nS
Data Set-up time
tSU;DAT
100
—
nS
Data Hold time
tHD;DAT
0
—
nS
Set-up time for Stop condition
tSU;STO
500
—
nS
Low period of the SCL clock
tLOW
0.6
—
uS
High period of the SCL clock
tHIGH
0.6
—
uS
Rise time of both SDA and SCL
tr
20+ 0.1Cb
300
nS
Fall time of both SDA and SCL
tf
20+ 0.1Cb
300
nS
Bus free time between Stop and Start
tBUF
200
—
nS
SDA
Sample
SCL
tHD;STA
tf
tr
tLOW
tHIGH
AD7 AD1
R15 R8
0
R7
R0
R15 R8
R7
tBUF
Byte 2
IC Address R/W
Byte 1
Additional Control Bytes
S
P
S
tSU;DAT
tHD;DAT
tSU;STO
Stop
Condition
Start
Condition
MSB
LSB
Master Writes to Slave
Input
SDA
SCL
tSP
AD7 AD1
D7
D6
1
D4
D3
D1
D0
Master
Not Ack
Status Byte
IC Address R/W
S
P
Stop
Condition
Start
Condition
MSB
LSB
Master Reads from Slave
Slave
Ack
Slave
Ack
Slave
Ack
Slave
Ack
Slave
Ack
D5
D2



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