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MC44CC373CAS 数据表(PDF) 14 Page - Freescale Semiconductor, Inc |
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MC44CC373CAS 数据表(HTML) 14 Page - Freescale Semiconductor, Inc |
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14 / 28 page  Digital Home 14 Freescale Semiconductor MC44CC373 CONTROL AND DATA REGISTER - DEFINITIONS The legacy MC44BS373/4 modulators had two 16-bit con- trol registers (Control and Frequency) and one data/status register. The new MC44CC373/374 family has the same reg- ister configuration and may be programmed with the same program software as the legacy devices. This backward com- patibility allows a faster migration to new product redesigns. There are some additional control features that may be used in new designs. However, it is not necessary to program these bits when upgrading a legacy system with the new modulator family. CONTROL REGISTER FORMAT The control register format is shown in Figure 6 and the descriptions for the High-order and Low-order bits (bytes) are listed in Table 13 and Table 14 respectively. Figure 6. Control Register Format MSB LSB R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 Reset State 1 AUX SO LOP PS X3 X2 SYSL PWC OSC ATT SFD1 SFD0 SREF X5 X4 Adr TEST MODE TEST MODE Table 13. Control Register (High-order) Bit Description Bit Name Description 15 Adr Address Function bit. Must be set to a logic 1. 14 AUX Gates the AUXIN pin 0 Disable AUXIN pin. 1 Enable AUXIN pin. 13 SO Sound Oscillator On/Off 0 Sound oscillator is on (normal mode). 1 Sound oscillator is disabled (osc and PLL section bias is turned off). 12 LOP Logic Output Port 0 LOP pin is low voltage. 1 LOP pin is high impedance. 11 PS Picture-to-sound carrier ratio 0 Picture-to-sound carrier ratio is 12 dB. 1 Picture-to-sound carrier ratio is 16 dB. 10 X3 Test Mode bits, must be set to logic 0 for normal operation. 9 X2 Test Mode bit. May be used for VHF divider 8 SYSL System L Enable - Selects AM sound and positive video modulation. (Applies to MC44CC373xxx devices only. For the MC44CC374xxx devices this bit is set to 0 and may not be modified). 0 System B/G enabled (FM sound and negative video modulation). 1 System L enabled (AM sound and positive video modulation). Table 14. Control Register (Low-order) Bit Description Bit Name Description 7 PWC Peak White Clip enable/disable 0 Peak White Clip on (system B/G). 1 Peak White Clip off (system L). 6 OSC UHF oscillator On/Off MC44CC373/ 374CAxxx MC44CC374T1Axx 0 Normal operation. UHF oscillator disabled. 1 UHF oscillator disabled. Normal operation. 5 ATT Modulator output attenuated. 0 Normal operation. 1 Modulator output attenuation (sound and video modulator sections bias is turned off). 4 SFD1 Sound subcarrier frequency control bits. SFD1 SFD0 Frequency 0 0 4.5 MHz 3 SFD0 0 1 5.5 MHz 1 0 6.0 MHz 1 1 6.5 MHz 2 SREF Sound PLL reference frequency 0 Sound reference frequency = 31.25 kHz 1 Sound reference frequency = 62.5 kHz 1 X5 Test Mode bits, must be set to logic 0 for normal operation. 0 X4 |
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