MPC8572ECVTATLD datasheet(46/140 Pages) FREESCALE

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MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4

Freescale Semiconductor

Ethernet: Enhanced Three-Speed Ethernet (eTSEC)

Figure 23. SGMII Transmitter DC Measurement Circuit

Table 38 lists the SGMII DC receiver elecetrical characteristics.

Table 38. SGMII DC Receiver Electrical Characteristics

Parameter

Symbol

Min

Typ

Max

Unit

Notes

Supply Voltage

XVDD_SRDS2

1.045

1.1

1.155

—

DC Input voltage range

—

N/A

—

Input differential voltage

LSTS = 0

VRX_DIFFp-p

100

—

1200

2, 4

LSTS = 1

175

—

Loss of signal threshold

LSTS = 0

VLOS

—

100

3, 4

LSTS = 1

—

175

Input AC common mode voltage

VCM_ACp-p

—100

Receiver differential input impedance

ZRX_DIFF

100

120

—

Receiver common mode input

impedance

ZRX_CM

—

Common mode input voltage

VCM

—Vxcorevss

—V

Note:

1. Input must be externally AC-coupled.

2. VRX_DIFFp-p is also referred to as peak to peak input differential voltage

3. The concept of this parameter is equivalent to the Electrical Idle Detect Threshold parameter in PCI Express. Refer to

PCI Express Differential Receiver (RX) Input Specifications section for further explanation.

4. The LSTS shown in the table refers to the LSTSAB or LSTSEF bit field of MPC8572E’s SerDes 2 Control Register.

5. VCM_ACp-p is also referred to as peak to peak AC common mode voltage.

6. On-chip termination to SGND_SRDS2 (xcorevss).

Transmitter

SD2_TXn

Vos

VOD

MPC8572E SGMII

SerDes Interface

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